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Senior Engineer II - CAD (Physical Verification)

Microchip
September 02, 2026
Full-time
On-site
Chandler, Arizona, United States
Physical Design Jobs, Level - Senior

Job Title

Senior Engineer II - CAD (Physical Verification)

Role Summary

Work in Microchip's CAD group developing and supporting back-end physical verification flows and tool automation for multiple process nodes. The role focuses on verification run decks, regression test cases, and supporting layout and design engineers worldwide.

Experience Level

Senior-level. The posting specifies approximately 7.5–10 years of experience in developing and supporting physical verification activities.

Responsibilities

Primary responsibilities include developing verification decks and flows, supporting engineers with PV issues, and improving verification quality and reliability.

  • Develop physical verification regression test cases to QA verification decks
  • Support layout and design engineers using Siemens Calibre, Cadence Pegasus, or Synopsys Hercules
  • Develop and maintain verification run decks, rule decks, and PERC setups
  • Utilize advanced EDA methods for ESD, ERC, voltage-aware DRC, and via-doubling checks
  • Work with Technology Development and Device Engineering to add devices and DRC rules
  • Verify and enhance foundry rule decks and support multiple PDKs (4nm–600nm)
  • Debug physical verification issues and support remote sites worldwide
  • Contribute to flows that improve manufacturability, quality, reliability, and yield

Requirements

Must-have technical skills and tool experience.

  • Expertise with Siemens Calibre and/or Cadence Pegasus (DRC, LVS) and PERC
  • In-depth knowledge of Calibre DesignRev scripting; fluent with SVRF and TVF
  • Experienced debugging PV issues with RVE, Vue, or other EDA visualizers
  • Skilled in Tcl/Tk, Perl, Python and automation of flows/procedures
  • Strong knowledge of layout rules, device identification, and foundry rule concepts
  • Solid knowledge of Design-for-Manufacturing solutions affecting quality and yield
  • Familiarity with Cadence Virtuoso and/or CalibreDRV; familiarity with Pegasus/Hercules syntax preferred
  • Able to support multiple foundry PDKs and remote sites; travel up to 25%

Education Requirements

Bachelor's degree in Electrical Engineering or a related field required; the posting specifies 7.5–10 years of relevant physical verification experience. Master's degree in Electrical Engineering or a related field is preferred.


About the Company

Company: Microchip

Headquarters: Chandler, Arizona, USA

Microchip is a leading semiconductor company focused on developing innovative solutions to enhance the human experience. With a commitment to empowering innovation, Microchip prioritizes the value of its employees by fostering a culture that supports their growth and contributions.

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Date Posted: 2026-09-01