Senior Engineer, HBM Layout

Job Title

Senior Engineer, HBM Layout

Role Summary

Design and implement physical layouts for analog, mixed-signal, custom digital, and full-chip blocks for High Bandwidth Memory (HBM) products. Work with global design, verification, and product teams to deliver manufacturable layouts that meet performance, reliability, and schedule targets. Use verification tools and data-driven methods to ensure build integrity and quality.

Experience Level

Senior — typically requires 5+ years of relevant experience in analog/custom layout development with advanced CMOS technologies (planar and FinFET).

Responsibilities

Key responsibilities include planning and executing layout tasks, ensuring physical verification, and coordinating across teams to meet schedule and quality goals.

• Create high-quality analog, mixed-signal, custom digital, and full-chip layout solutions for advanced HBM products.
• Perform and drive physical verification activities including DRC, LVS, antenna checks, and documentation.
• Lead layout planning, area estimation, scheduling, and execution across multiple projects.
• Collaborate with global build, circuit, verification, and product engineering teams to resolve layout issues and optimize performance.
• Apply AI-enabled tools and automation to improve layout productivity and quality.

Requirements

Must-have technical skills and hands-on experience.

• 5+ years experience in analog/custom layout development using advanced CMOS technologies (moved to Experience Level).
• Proficiency with Cadence Virtuoso Layout Suite (VLE/VXL).
• Experience with Mentor Graphics Calibre for DRC, LVS, and physical verification.
• Hands-on experience laying out complex analog and mixed-signal blocks (PLLs, ADCs, DACs, LDOs, bandgaps, charge pumps, comparators, temperature sensors, etc.).
• Strong understanding of analog layout fundamentals: matching, electromigration, latch-up prevention, parasitics, IR drop, signal integrity, coupling, and reliability.
• Experience supporting multiple tape-outs and managing concurrent layout projects is preferred.
• Ability to debug custom layout issues, optimize physical builds, and work with distributed engineering teams.
• Familiarity with AI-assisted engineering workflows and automation tools is a plus.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, VLSI Engineering, or a related technical field; equivalent practical experience acceptable.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.