Senior Engineer, Front End (FE) Central Process Integration Engineering (CPIE) PI

Job Title

Senior Engineer, Front End (FE) Central Process Integration Engineering (CPIE) PI

Role Summary

Lead cross-functional technical efforts to improve packaging product yield and quality, support new product introductions, and standardize business processes across Micron's global network. The role focuses on root-cause problem solving, project execution, and integration between packaging technology and front-end manufacturing.

Experience Level

Senior — requires substantial semiconductor experience; posting specifies about 5 years of relevant semiconductor experience and additional domain experience (see Requirements).

Responsibilities

Primary responsibilities include networked project leadership, technical problem solving, and driving digital/AI-enabled improvements to engineering and process workflows.

• Lead global projects and drive network-wide best-practice sharing and benchmarking to improve yield and efficiency.
• Define and qualify packaging-technology interactions with front-end processes ahead of product qualification.
• Lead PI Loop taskforces to resolve yield and quality issues and optimize process flow to meet yield targets.
• Integrate cross-functional expertise and standardize business processes to maximize productivity and value.
• Use AI-enabled methods, analytics, and digital tools to accelerate root-cause analysis and improve decision quality.
• Maintain and expand domain technical expertise and identify opportunities for innovation.
• Prepare and deliver presentations on project status and proposals to small and large audiences.
• Coordinate with fabrication, product engineering, test, and quality groups; escalate and drive fixes as needed.
• Travel to Micron fabrication sites as required (travel frequency: approximately 20–50%).

Requirements

Must-have technical experience and skills relevant to DRAM and wafer fabrication; remove academic degree items below (see Education Requirements).

• Approximately 5 years relevant experience in semiconductor device physics, DRAM operations, wafer fabrication process flows, parametric/electrical test, and probe yield.
• Approximately 3 years experience with DRAM High Performance Memory (HPM), BEOL integration, advanced packaging, and layout.
• Strong data analysis, troubleshooting, problem-solving, reporting, and presentation skills with attention to detail.
• Proven teamwork, interpersonal skills, and ability to build effective cross-functional relationships.
• Good organizational skills and ability to work with minimal supervision; flexible in taking on additional responsibilities.
• Intermediate to advanced proficiency in Microsoft Office, AI-enabled productivity tools (e.g., Microsoft Copilot), and digital collaboration platforms.
• Experience or strong aptitude for applying AI, data analytics, and digital technologies to improve engineering decision-making and efficiency.
• Willingness and ability to travel as needed to support department goals.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Microelectronics, Physics, Chemistry, Materials Science Engineering, or a related technical field is specified in the posting.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.