Senior Engineer, FPGA

Job Title

Senior Engineer, FPGA

Role Summary

Drive development and delivery of FPGA images for pre-silicon prototyping to support SoC design verification, software development, and system validation. Work closely with SoC design, verification, software, and system test teams as their primary FPGA prototyping engineer.

Accountable for implementing FPGA builds, defining timing constraints, debugging RTL on FPGA platforms, and maintaining repeatable delivery of prototypes for internal customers.

Experience Level

Senior — typically requires substantial experience. The posting indicates around 8+ years of FPGA design, bring-up, debugging, and verification and about 6+ years of SoC design/verification experience.

Responsibilities

Key responsibilities include building, validating, and supporting FPGA prototypes and related test flows.

• Implement and debug FPGA designs on AMD/Xilinx prototyping platforms using Vivado / ISE tool flows.
• Implement and debug FPGA designs on Intel Stratix-10 platforms using Quartus Prime Pro.
• Define and implement timing constraints and support Static Timing Analysis for FPGA builds.
• Support and maintain a regression test-suite of system-level test cases to validate FPGA builds.
• Assist teams in reproducing, triaging, and debugging issues pre-silicon and post-silicon.
• Debug RTL designs using FPGA toolchains, logic analyzers, and protocol analyzers; iterate designs to deliver stable images to software and validation teams.

Requirements

Must-have skills and experience required to perform the role; nice-to-have items follow.

Must-have:

• Extensive FPGA design, bring-up, debugging, and verification experience (senior level).
• Practical experience with FPGA-based prototyping and top-down FPGA development processes.
• Experience defining timing constraints and performing Static Timing Analysis.
• Proficiency with Intel Quartus Prime Pro and Xilinx Vivado / ISE tool suites.
• Solid understanding of the RTL-to-bitstream tool flow and FPGA build processes.
• Familiarity with C programming, source control (git), simulation tools, and lab/debug instrumentation.

Nice-to-have:

• Experience with Stratix 10 and AMD VU19P prototyping systems (partitioning, throughput tuning).
• Experience with Siemens proFPGA/VPS, ARM MPS4 platform, or similar emulation/prototyping platforms.
• Experience with low-power design, embedded microprocessors, SystemVerilog verification environments, and advanced Verilog coding.
• Familiarity with Python scripting, YAML, and peripheral protocols (I2C, I3C, MSPI, UART, USB).

Education Requirements

Bachelor of Science in Electrical Engineering (BSEE) or Computer Engineering (BSCE) is specified in the posting. The posting also indicates experience expectations of ~6+ years of SoC design/verification experience and ~8+ years of FPGA design/bring-up/debug experience.

About the Company

Company: Ambiq

Headquarters: Austin, TX, United States

Semiconductor company developing ultra-low-power microcontroller units (MCUs) and system-on-chip (SoC) platforms for battery-powered and edge devices, focusing on low-power IP, RTL, and production silicon solutions.