Senior Engineer/ Engineer – Package Silicon Integration Engineer

Job Title

Senior Engineer/ Engineer – Package Silicon Integration Engineer

Role Summary

Work on silicon-to-package integration for memory applications, focusing on characterization, virtual prototyping, and design-rule development to enable manufacturable, reliable package-silicon solutions.

The role partners with silicon, package, lab, and manufacturing teams to define test vehicles, correlate simulation and empirical data, and transition validated integration designs into production.

Experience Level

Senior level (title contains "Senior"). Years-of-experience guidance not specified in the posting.

Responsibilities

Primary responsibilities include planning, evaluation, and cross-functional execution of silicon-package integration work:

• Define and execute test vehicle strategies and Design of Experiments (DOEs) to characterize CPI behaviors and validate integration assumptions.
• Integrate new silicon technologies with package platforms; identify and resolve CPI issues and guide technology maturation.
• Support and apply virtual prototyping and multi-physics simulation (mechanical, thermal, electrical) to reduce physical builds and inform test scope.
• Correlate simulation outputs with physical characterization, package build data, and reliability results to improve predictive confidence.
• Develop and document best-known processes (BKMs), material selections, process guidelines, and design rules for manufacturing hand-off.
• Collaborate with silicon and package developers to produce stack-up guidance and layout recommendations that improve reliability and manufacturability.
• Support root cause analysis by combining failure analysis, test vehicle data, and simulation insights.
• Monitor technology roadmaps (e.g., 3DS, HBM, advanced node scaling) and identify gaps in test methodology and virtual prototyping capabilities.

Requirements

Must-have technical skills and experience for successful performance in this role:

• Understanding of IC package development and CPI concepts, including test vehicle development and BEOL/front-end fab interactions.
• Proven ability to define and execute test vehicle strategies and translate data into DOE decisions and design rules.
• Familiarity with virtual prototyping concepts and ability to use simulation to reduce dependency on physical builds.
• Experience correlating simulation and empirical results to inform integration decisions and manufacturability improvements.
• Experience coordinating cross-functional technical projects across global R&D, fabs, and manufacturing teams.
• Strong analytical, problem-solving, and technical communication skills (oral and written English).
• Preferred: background in fab metallization, BEOL integration, or front-end fab processes.
• Preferred: familiarity with at least one simulation domain such as FEA (thermo-mechanical), thermal simulation, or electrical/ SI/PI modeling.
• Preferred: experience with AI/ML tools for data visualization or automation, and knowledge of semiconductor fabrication, assembly, and test processes.

Education Requirements

M.S. or Ph.D. in Electrical Engineering, Mechanical Engineering, Materials Science, Physics, Microelectronics, or a related technical field. Ph.D. strongly preferred but not required; relevant hands-on industry experience may substitute. The posting also notes preference for candidates with limited years since degree in some cases, but experience expectations are otherwise unspecified.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.