Senior Engineer

Job Title

Senior Engineer

Role Summary

Verification engineer responsible for IP and SoC integration verification within the Hardware Engineering team in Bengaluru. The role focuses on architecting and implementing SystemVerilog/UVM testbenches, formal verification strategies, and SoC-level scenario and performance verification.

Works across architecture, design, modelling, silicon validation and FPGA/board teams to deliver verification plans, tests and coverage closure for Arm-based designs.

Experience Level

Senior — 3 to 15 years of relevant experience in digital hardware verification, SoC or IP verification and verification methodology.

Responsibilities

Key responsibilities include planning and executing verification for IP and SoC RTL, developing test infrastructure, and coordinating verification activities across teams.

• Architect and implement SystemVerilog/Verilog testbenches and reusable UVM components.
• Define and execute verification test plans and methodologies for SoC scenarios and performance verification.
• Develop and run embedded low-level tests (C/C++ and assembly) and C-based software tests for verification.
• Define formal verification properties, drive proofs and work toward coverage closure.
• Debug test failures and root-cause issues in collaboration with design and validation teams.
• Plan tasks, estimate schedules and report progress to project leads and management.
• Collaborate with architecture, modelling, performance analysis, silicon validation, FPGA and board development teams.

Requirements

Must-have technical skills and experience for the role; concise list of essential and desirable items.

• Must-have: Strong knowledge of digital hardware verification using Verilog/SystemVerilog and experience in SoC/IP verification flows.
• Experience building UVM-based testbenches and test infrastructure; exposure to test planning and verification methodology.
• Experience with embedded low-level programming (C/C++) and writing/running assembly-level tests (preferably ARM).
• Experience defining and executing formal verification strategies and working toward coverage closure.
• Good problem solving and debugging skills; familiarity with SoC performance and integration verification (e.g., CHI, DDRx, LPDDRx).
• Knowledge of clock domain crossing verification and IP/SoC verification strategy.
• Scripting and automation experience (Tcl, Perl, Python, shell) for verification flow automation.
• Nice-to-have: Experience with formal tools (Jasper), emulation, UPF power-aware verification, GLS, DFT/DFD, porting peripheral drivers, and embedded OS/device driver experience.

Education Requirements

Not specified.

About the Company

Company: Arm

Headquarters: Cambridge, United Kingdom

ARM is a global leader in semiconductor and software design, driving innovation in computing technology. The company specializes in designing processors and systems that provide the essential building blocks for electronic devices. ARM's architecture is widely used in smartphones, servers, and IoT devices, and its collaborative culture fosters bold thinking, diversity, and high-impact benefits for its talented workforce.