Senior Engineer - DFT

Job Title

Senior Engineer - DFT

Role Summary

Architect and implement design-for-test (DFT) solutions for Arm SoCs, integrating test logic at RTL and gate level, validating features, and producing automated test patterns for silicon. Collaborate with front-end, back-end, timing, and test/debug teams to ensure testability and timing closure across the chip delivery flow.

Experience Level

Senior. Source lists an experience range of 3–20 years; the role expects significant hands-on DFT experience within that range.

Responsibilities

Primary responsibilities include implementing DFT features across the design flow and collaborating with cross-functional teams to validate and deliver silicon test solutions.

• Architect, implement, and validate DFT techniques for SoCs at RTL and synthesis/gate levels.
• Insert DFT logic into RTL and gate-level designs and validate features across the flow.
• Generate ATE-targeted test patterns (ATPG), perform fault simulation, and produce diagnostics for memory and scan.
• Work with front-end design/verification, back-end synthesis/place-and-route, and static timing analysis teams to achieve timing closure after DFT insertion.
• Support silicon characterization, debug, and test hardware validation activities.

Requirements

Must-have technical skills and tools for immediate contribution.

• Experience with scan compression and insertion, Memory BIST and repair schemes, Logic BIST, JTAG/IJTAG, at-speed test, ATPG, fault simulation, and memory/scan diagnostics.
• Experience with back-annotated gate-level verification and silicon debug.
• Hands-on coding in Verilog RTL and scripting with TCL and/or Perl.
• Proficiency in Unix/Linux environments.

Nice-to-have

• Familiarity with IEEE 1149, 1500, 1687, 1838 standards.
• Experience with synthesis and static timing analysis related to DFT insertion.
• Knowledge of SoC architectures including multi-clock domains and low-power design practices.
• Experience with Siemens, Cadence, and/or Synopsys DFT and simulation tools; validated understanding of Siemens DFT tools is a plus.
• Familiarity with Arm IP (Cortex CPUs, Mali GPUs, AMBA protocols, CoreLink interconnects, CoreSight debug).
• Experience with 2.5D/3D test methods and ATE validation.

Education Requirements

Bachelor's or Master's degree (or equivalent practical experience) in Electronic Engineering, Computer Engineering, or a related technical field. Equivalent experience is explicitly accepted.

About the Company

Company: Arm

Headquarters: Cambridge, United Kingdom

ARM is a global leader in semiconductor and software design, driving innovation in computing technology. The company specializes in designing processors and systems that provide the essential building blocks for electronic devices. ARM's architecture is widely used in smartphones, servers, and IoT devices, and its collaborative culture fosters bold thinking, diversity, and high-impact benefits for its talented workforce.