Senior Engineer — Design Verification

Job Title

Senior Engineer — Design Verification

Role Summary

Ownership role on a verification team developing PVT sensing IP for integration in SoCs. The engineer will design, build, and maintain UVM-based verification environments, drive coverage closure, and support gate-level and emulation flows.

Works closely with design, DFT, physical design, firmware and other cross-functional partners to ensure robust silicon delivery.

Experience Level

Senior-level. The posting indicates 3–5 years of hands-on digital verification experience.

Responsibilities

Primary verification activities and ownership responsibilities:

• Plan and execute IP and SoC verification using UVM environments, agents, and scoreboards.
• Develop behavioral models (SystemVerilog/TLM stubs, BFMs, checkers) and AMS-friendly models aligned to specifications.
• Write constrained-random and directed testcases, assertions (SVA), and debug issues using waveforms and logs.
• Drive code and functional coverage to targets; maintain stable regression suites and CI pipelines.
• Run gate-level simulations with and without SDF; perform reset, X-propagation, and low-power checks.
• Support emulation activities and collaborate with design, DFT, PD, and firmware teams during bring-up and tapeout.

Requirements

Key skills and experience required; concise distinction between must-have and nice-to-have.

• Must-have: Proficiency in Verilog, SystemVerilog, and UVM for environment development and maintenance.
• Must-have: Hands-on IP/SoC verification ownership experience including test planning, coverage, and regression management.
• Must-have: Experience writing and debugging SystemVerilog Assertions (SVA), constrained-random tests, and directed testcases.
• Must-have: Proven experience with coverage closure, waveform analysis, and log triage.
• Must-have: Scripting for automation (Shell, Makefiles, Python).
• Nice-to-have: Experience with gate-level simulation flows, SDF, emulation platforms, and AMS-aware verification.
• Nice-to-have: Mentoring junior engineers and cross-team leadership experience.

Education Requirements

Not specified.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.