Senior Engineer - DEG Layout

Job Title

Senior Engineer - DEG Layout

Role Summary

Responsible for layout design and development of analog, mixed-signal, custom digital blocks, standard cells and full-chip layouts in advanced CMOS processes. Works within a layout engineering team to deliver block-level layouts to schedule while ensuring quality and manufacturability.

Experience Level

Senior-level. Target experience: 5–8 years in analog/custom layout design.

Responsibilities

Key responsibilities include hands-on layout work, verification, mentoring, and cross-team coordination.

• Perform layout design for critical analog, mixed-signal and custom digital blocks, standard cells and full-chip integration.
• Execute physical verification tasks: LVS, DRC, antenna, matching, latch-up, EM/IR, totem checks and quality documentation.
• Develop digital block layouts using automated placement-and-route tools where applicable.
• Estimate area/time, plan schedules, delegate tasks, and manage multiple projects to meet delivery dates.
• Review and guide junior engineers on sub-block layouts and ensure adherence to design constraints and quality standards.
• Communicate effectively with global engineering teams to ensure project alignment and success.
• Improve layout efficiency by developing scripts/automation and exploring AI-assisted layout tools.

Requirements

Must-have technical skills and experience, followed by desirable additions.

• 5–8 years of experience in analog/custom layout design for advanced CMOS processes.
• Proven expertise with Cadence VLE/VXL and Mentor/Calibre DRC & LVS tools.
• Hands-on experience creating layouts for critical analog blocks (examples: temperature sensor, PLL, ADC, DAC, LDO, bandgap, reference generators, charge pump, current mirrors, comparators, differential amplifiers).
• Strong understanding of analog layout fundamentals: matching, electro-migration, latch-up, coupling, crosstalk, IR-drop, active/passive parasitics and their effects on speed, capacitance, power and area.
• Ability to interpret design constraints and deliver high-quality layouts with effective physical verification skills.
• Basic skill in scripting/automation to improve productivity.
• Excellent verbal and written communication skills.
• Nice-to-have: experience supporting multiple tape-outs and familiarity with AI tools for layout automation.

Education Requirements

Not specified.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.