Senior Engineer, DDEG Design Methodology

Job Title

Senior Engineer, DDEG Design Methodology

Role Summary

Provide verification and methodology development for DRAM and emerging memory designs, focusing on gate-level custom designs, power management, and high-speed interfaces. Own verification cycles, testbench development, and automation to improve coverage and debug efficiency.

Work closely with global design and verification teams to create verification flows, run regressions, and accelerate pre‑silicon and silicon learning loops using automation and AI‑enabled tools.

Experience Level

Senior — typically 7+ years of relevant design and verification experience or equivalent industry experience.

Responsibilities

Accountabilities include verification ownership, automation, and cross‑functional collaboration.

• Use AI-based tools, agentic workflows, and automation frameworks to accelerate verification cycles and improve debug efficiency.
• Validate AI outputs against specifications, simulations, waveforms, assertions, and coverage reports; document accepted changes.
• Simulate, analyze, and debug pre‑silicon block‑level and full‑chip designs for DRAM and emerging memory architectures.
• Develop test cases, stimuli, and verification environments to increase functional coverage.
• Build and maintain SystemVerilog/UVM testbenches, test vectors, and run regressions for coverage analysis.
• Collaborate with international colleagues to develop new verification flows and methodologies.
• Apply mixed‑signal verification and co‑simulation techniques as required by the design.

Requirements

Key technical skills and experience required or strongly preferred.

• Must-have: Hands-on experience with SystemVerilog and UVM-based verification; SV testbench development at block and full-chip levels.
• Must-have: Proficiency with Verilog and SPICE or Verilog simulations; experience with simulation tools such as Xcelium, vsim, Waveview, Simvision, and Hspice.
• Must-have: Experience in DRAM, SRAM, or other memory-related fields; experience in AMS verification and co-simulation.
• Must-have: Strong debugging, communication, and teamwork skills; ability to guide junior team members.
• Nice-to-have: PLI coding, Real Number Models, and familiarity with Virtuoso and Finseim.
• Nice-to-have: Scripting skills (Python, Perl) and experience leveraging automation frameworks to speed verification.

Education Requirements

Bachelor's or postgraduate degree in Electronics Engineering or a related engineering field is required.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.