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Senior Engineer, CPU RTL Design

Tenstorrent
July 29, 2026
Full-time
Remote friendly (Santa Clara, California, United States)
Worldwide
$100,000 - $500,000 USD yearly
RTL Design Jobs, Level - Senior

Job Title

Senior Engineer, CPU RTL Design

Role Summary

Design and implement RTL for high-performance RISC-V CPU blocks. Work on microarchitecture, RTL delivery, and convergence for functionality, timing, and power.

Join a CPU design team and collaborate with design verification (DV), physical design (PD), performance, and validation teams to deliver a production-quality CPU.

Experience Level

Senior. The hiring level will be calibrated during interviews and candidates at different experience levels may be considered for appropriate roles.

Responsibilities

Deliver RTL and microarchitecture for portions of a high-performance CPU and collaborate across engineering teams to meet PPA goals.

  • Specify, design, and own RTL for assigned CPU blocks (e.g., rename, scheduler, ROB, load/store, branch prediction, cache, datapath).
  • Collaborate with DV, PD, and performance engineers to achieve functional, timing, and power targets.
  • Optimize power, performance, and area through RTL experiments and trade-off analysis.
  • Debug RTL across multiple hierarchies and support pre-silicon and post-silicon validation activities.
  • Improve RTL design environment, tools, and methodologies to increase development efficiency.

Requirements

Concise list of required and desirable skills.

  • Must-have: Strong CPU microarchitecture experience (components such as rename, scheduler, ROB, load/store, branch prediction, cache, or datapath).
  • Must-have: Proficient in RTL coding (Verilog or VHDL) and experienced with simulation, synthesis, and power-analysis flows.
  • Must-have: Proven ability to debug RTL/logic across design hierarchies and support pre- and post-silicon debugging.
  • Must-have: Experience defining microarchitecture, writing design specifications, and performing performance-driven trade-off analysis.
  • Nice-to-have: Prior experience with RISC-V CPU implementations and high-performance CPU design projects.
  • Nice-to-have: Familiarity with timing/power closure flows and integrating open-source or industry-standard RTL tools.

Education Requirements

Not specified.


About the Company

Company: Tenstorrent

Headquarters: Austin, Texas, United States

Tenstorrent is a technology company focused on designing innovative computing solutions. They are known for their expertise in the development of advanced hardware, including ASICs and SoCs, aimed at enhancing performance and efficiency in various applications.

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Date Posted: 2026-07-22