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Senior Engineer - CPU DV

SiFive
September 02, 2026
Full-time
On-site
Hyderabad, Telangana, India
Verification Jobs, Level - Senior

Job Title

Senior Engineer - CPU DV

Role Summary

Lead end-to-end verification of CPU core components and microarchitectural features, driving test plan development, execution, and coverage closure. Work on verification environments, debug, and regression across simulation and emulation platforms while collaborating with architecture and design teams.

Experience Level

Senior. No specific years-of-experience were provided in the posting.

Responsibilities

Primary duties include planning and executing verification for CPU cores and related components.

  • Own end-to-end verification for CPU components: Fetch, Decode, Execute, Memory, Pipeline, Cache, MMU.
  • Develop verification test plans from architecture specifications and drive coverage closure (functional and code coverage).
  • Lead verification using SystemVerilog and UVM.
  • Implement testbenches, constrained-random tests, scoreboards, and checkers.
  • Validate microarchitectural features such as out-of-order execution, branch prediction, cache coherency, virtual memory/paging, RAS, and FuSa-related features.
  • Drive regressions and debug complex failures across simulation and emulation platforms.
  • Work closely with Architecture & Design teams to validate ISA behavior, corner cases, exceptions, and interrupts; perform ISA-level validation and compliance testing.

Requirements

Key must-have skills and constraints for the role.

  • Proven experience in CPU core verification and ownership of verification tasks.
  • Strong practical knowledge of SystemVerilog and UVM; capable of developing and leading verification environments.
  • Experience creating testbenches, constrained-random tests, scoreboards/checkers, and coverage models.
  • Skilled at debugging regressions and complex failures on simulation and emulation platforms.
  • Working knowledge of ISA behavior and compliance testing for ISAs such as RISC-V, ARM, or x86.
  • Familiarity with microarchitecture topics: OoO execution, branch prediction, cache coherency, MMU/virtual memory, RAS and functional-safety considerations.
  • Must be eligible to work in India; employment contingent on background/reference checks and export-control authorization or the company's ability to obtain necessary export approvals.
  • Nice-to-have: prior experience with CPU performance validation, formal verification, or hardware emulation platforms.

Education Requirements

Not specified.


About the Company

Company: SiFive

Headquarters: San Mateo, California, United States

SiFive is a pioneering company in the RISC-V ecosystem, focused on transforming the future of computing by delivering high-performance, data-intensive RISC-V solutions. Their compute platforms empower leading technology firms to innovate across various markets, including AI, machine learning, and automotive sectors. SiFive is recognized for its commitment to ongoing innovation and fostering collaboration among talented teams, impacting lives by enabling advanced chip design.

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Date Posted: 2026-09-02