Senior Engineer, Analog Design
SynopsysJob Title
Senior Engineer, Analog Design
Role Summary
Design and develop analog and mixed-signal IP blocks (High-Speed I/O, LVDS, crystal oscillators, bandgaps, bias circuits, LDOs, supply detectors and related blocks). Work on transistor-level implementation through silicon bring-up and characterization as part of a multidisciplinary analog IP team.
Collaborate with layout, digital, verification, validation, and product engineering teams to deliver production-quality analog solutions for interface IP products.
Experience Level
Senior-level. No specific years of experience specified in the posting.
Responsibilities
Primary technical responsibilities and cross-functional activities.
- Design, simulate, and validate analog and mixed-signal IP blocks (HSTIO, LVDS, oscillators, bandgap references, bias generators, LDOs, supply detectors, etc.).
- Perform transistor-level circuit design and optimization across PVT conditions.
- Execute pre-layout and post-layout verification: corner, Monte Carlo, mismatch, noise, reliability, and performance analysis.
- Work with layout teams on matching, shielding, isolation, and parasitic-aware layout practices.
- Participate in architecture definition, design reviews, documentation, and technical discussions.
- Support silicon bring-up, lab characterization, debugging, and correlation of silicon results to simulations.
- Contribute to improving design methodologies for performance, robustness, and power efficiency.
Requirements
Must-have skills and relevant experience; preferred items noted separately.
- Strong experience in analog and mixed-signal circuit design.
- Proven expertise in one or more areas: High-Speed I/O (HSTIO), LVDS, crystal oscillators, bandgap references, bias circuits, LDO regulators, supply detection circuits, or similar analog IPs.
- Solid understanding of transistor-level fundamentals: gain, bandwidth, noise, stability, matching, and power optimization.
- Experience with industry-standard analog design and simulation tools.
- Familiarity with pre-layout and post-layout verification methodologies (PVT, Monte Carlo, reliability, corner simulations).
- Experience collaborating with layout engineers on analog layout reviews and parasitic-aware optimization.
- Exposure to silicon bring-up, characterization, debugging, and lab validation.
- Strong problem-solving, communication, and cross-functional collaboration skills.
- Nice to have: understanding of ESD protection concepts and analog reliability considerations.
Education Requirements
Not specified.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
