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Senior Emulation Performance Methodology & Debug Engineer

Qualcomm
October 13, 2026
Full-time
On-site
Tijuana, Baja California, Mexico
FPGA Programming Jobs, Level - Senior

Job Title

Senior Emulation Performance Methodology & Debug Engineer

Role Summary

Work on Qualcomm's Emulation team within the SoC digital hardware organization to develop and support pre-silicon emulation and FPGA prototyping platforms for SoC designs. Collaborate with architects, designers, verification and software engineers, and customers to enable pre-silicon bring-up, validation, and debug.

Experience Level

Senior. The posting prefers candidates with several years of emulation and silicon experience (typical preferred: 4–5+ years); exact minimum experience varies by degree (see Education Requirements).

Responsibilities

Primary responsibilities focus on emulation/prototyping platform enablement, debug, and cross-team collaboration.

  • Develop and deploy uniform global methodologies for emulation build generation and debug across FPGA-based emulation platforms.
  • Lead bring-up and validation of FPGA prototypes and emulation hardware (including timing closure, synthesis, place-and-route workflows).
  • Debug low-level hardware and software issues, validate digital circuits, and support waveform/content debug workflows.
  • Support pre-silicon prototyping for new SoC designs and enable pre-silicon bring-up activities.
  • Collaborate across sites and with vendors; communicate status and technical issues to engineering and management stakeholders.
  • Maintain and improve emulation toolchains and debug infrastructure for production use.

Requirements

Relevant technical skills and practical experience required for successful performance in the role.

Must-have:

  • Hands-on experience in emulation and silicon environments (experience level stated as preferred 4–5+ years).
  • Expertise in Verilog/SystemVerilog and experience with C.
  • Scripting proficiency in Python and TCL.
  • FPGA expertise (Xilinx/Intel), including tools and timing-closure techniques.
  • Experience debugging hardware/software issues and using debug tools (JTAG, kernel debuggers).
  • Practical knowledge of SoC building blocks (interconnects, power management/PMIC, NoC, peripherals) and validation of digital circuits.

Nice-to-have:

  • Familiarity with emulation platforms such as FPGA prototyping, Veloce, Palladium and related emulation tool workflows (synthesis, place-and-route, constraints, clocking, timing closure).
  • Experience with cross-site collaboration, vendor engagement, and executive-level communication.
  • Experience leading pre-silicon prototyping and bring-up for new SoC designs.
  • Understanding of power and performance tradeoffs.

Education Requirements

The posting lists degrees in Science, Engineering, or a related field. Variants across the posting: Bachelor's with typically 2–4+ years of ASIC/design/verification/validation/integration experience, Master's with 1–3+ years, and PhD with 0–2+ years; equivalents in related work experience are acceptable where specified.


About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

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Date Posted: 2026-10-09