Senior Emulation Engineer

Job Title

Senior Emulation Engineer

Role Summary

Join the Design Verification team to develop and maintain emulation-based verification environments, reference models, bus-functional monitors/drivers, and tools for complex multi-core SoCs. The role focuses on architecting and executing emulation strategies to validate SoC designs against customer specifications.

Experience Level

Senior — typically 10+ years of verification, firmware, and software development experience (see Education Requirements for degree/experience combinations).

Responsibilities

Key responsibilities include designing and executing emulation-based verification flows and supporting firmware bring-up and tooling.

• Architect and implement functional verification environments, including reference models and bus-functional monitors/drivers.
• Develop and tune tests using random techniques and coverage analysis; meet coverage goals and maintain regression suites.
• Bring up emulation models and perform reset sequence and firmware bring-up activities.
• Debug failures, collaborate with designers to resolve hardware and firmware issues.
• Design and maintain software tools to streamline verification and support large-scale, parallel compute environments.
• Author and maintain detailed emulation test plans and unit/regression tests for verification tools.

Requirements

Must-have technical skills, platform experience, and professional attributes.

• Extensive practical experience with emulation platforms and building complex SoC emulation models (Synopsys Veloce, Cadence Palladium/ZeBu, Siemens, or equivalent).
• Proven hands-on experience bringing up emulation models and supporting firmware execution on emulation platforms.
• Strong knowledge of processor architecture, SoC components, interconnect buses, and common I/O protocols (PCIe, CXL, Ethernet).
• Familiarity with memory interface technologies (DDR, HBM) and related verification scenarios.
• Experience writing verification tests and plans; working knowledge of SystemVerilog and UVM.
• Proficient in scripting (Perl, Python, Tcl, UNIX shell) and comfortable developing verification tooling and automation.
• Good understanding of Linux operating systems and debugging in Linux environments.
• Ability to define emulation strategy, specify platform requirements, and drive verification execution for large-scale products.
• Strong debugging skills, attention to detail, self-directed, and able to work effectively with cross-functional teams.
• Note: This position may require eligibility to access export-controlled technology; candidates may be subject to export license review.

Education Requirements

BS in Computer Engineering, Electrical Engineering, or Computer Science with 10+ years of relevant verification/firmware/software development experience; or MS/PhD in a related field with 5+ years of relevant experience.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.