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Senior EDA Tools Engineer - PERC ESD

Intel Corporation
October 13, 2026
Full-time
On-site
Hillsboro, Oregon, United States
$149,600 - $284,580 USD yearly
EDA Jobs, Level - Senior

Job Title

Senior EDA Tools Engineer - PERC ESD

Role Summary

Develop and maintain ESD and LU rule decks, methodologies, and automation for Intel PERC process technologies as part of the Design Technology Platform (DTP) / PDK team. The role enables internal design teams to validate and sign off reliability checks and drives tool and methodology improvements with cross-functional partners and EDA vendors.

Experience Level

Senior. Minimum technical experience guidance: 2+ years working on ESD PERC rule deck development; preferred 4+ years experience with reliability/DRC tools.

Responsibilities

Key responsibilities include:

  • Develop ESD/LU rule decks aligned with the ESD Design Rule Manual and reliability requirements.
  • Create and maintain reliability ESD and LU design rule methodologies and specifications.
  • Collaborate with internal design, reliability, CAD teams and external EDA vendors to define and implement tool features and requirements.
  • Build and execute test cases for rule debugging, validation, and signoff.
  • Define QA requirements and implement automation to improve robustness and efficiency of rule checks.
  • Lead initiatives to enhance verification automation, tools, and methodologies.
  • Identify and analyze ESD/LU design problems, determine root causes, and drive cross-team solutions.

Requirements

Must-have and preferred technical qualifications.

  • Must-have: 2+ years' experience developing and debugging ESD PERC rule decks/runsets or equivalent reliability/DRC tools.
  • Must-have: 2+ years' scripting experience (Python, Tcl, Perl, or similar) for QA and flow automation.
  • Must-have: Experience building and executing test cases for rule validation and signoff and driving QA automation.
  • Must-have: Proven ability to collaborate with cross-functional teams and external EDA vendors to define tool requirements.
  • Nice-to-have: 4+ years' experience with reliability/DRC tools.
  • Nice-to-have: Industry experience in physical design verification, device physics, process technology, extraction, or related domains.
  • Nice-to-have: Knowledge of ESD/LU PreSi models (HBM, CDM), I/O design, and related methodologies.
  • Nice-to-have: Leadership, strong communication skills, and experience driving cross-functional or industry-wide initiatives.

Education Requirements

Minimum: Master's degree or PhD in Electrical Engineering or Computer Engineering (specified as required in the posting).


About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.

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Date Posted: 2026-10-08