Senior EDA/CAD Engineer (ASIC)

Job Title

Senior EDA/CAD Engineer (ASIC)

Role Summary

Owner for IC CAD/design methodology and PDK management for advanced FinFET nodes. Deliver and maintain Cadence-based flows, physical verification/signoff methodologies, and automation to enable reliable tapeouts.

The role interfaces with design teams, foundries, and EDA vendors to qualify PDKs, resolve technical issues, and improve design productivity.

Experience Level

Senior level — requires substantial hands-on experience. The posting specifies 5+ years of IC CAD / design methodology experience.

Responsibilities

Primary responsibilities include PDK management, flow development, verification methodology, and automation.

• Manage, qualify, and maintain advanced foundry PDKs for FinFET technologies (5nm, 3nm, 2nm).
• Develop, optimize, and support end-to-end Cadence-based design flows for multiple design types (analog, digital, mixed-signal as applicable).
• Establish and maintain physical verification and signoff methodologies using tools such as Calibre and StarRC.
• Support reliability verification activities, including EM/IR analysis and electrical rule checking.
• Drive flow automation, scripting, and tool integration to increase design productivity and reduce manual steps.
• Collaborate with internal design teams, foundry contacts, and EDA vendors to troubleshoot and resolve technical issues.

Requirements

Core technical skills and hands-on experience required for the role.

• 5+ years of hands-on IC CAD / design methodology experience in advanced semiconductor technologies.
• Proven experience with advanced-node FinFET processes (5nm, 3nm, or 2nm).
• Deep expertise with Siemens Calibre, Synopsys StarRC, and Cadence (Virtuoso, Innovus) tool flows.
• Strong scripting ability — SKILL and Perl required; experience with Python, Tcl, and shell scripting.
• Solid Linux experience, including use of compute clusters/grids and version control systems.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline (as stated in the posting).

About the Company

Company: Spanidea

Headquarters: San Jose, CA, USA

Semiconductor engineering firm specializing in ASIC/IC design, CAD/EDA tool flows, and design methodology services for advanced process nodes.