Senior Director, R&D Engineering — Interface PHY (Ethernet SerDes)

Job Title

Senior Director, R&D Engineering — Interface PHY (Ethernet SerDes)

Role Summary

Lead an R&D organization developing 112G and 224G Ethernet SerDes and Interface PHY IP for AI/HPC, networking, and data-center markets. Own execution planning, staffing, delivery commitments, cross-functional technical alignment, and customer issue resolution across multiple concurrent programs.

Operate across distributed teams and time zones, partner with product and program management, and develop engineering talent through coaching and succession planning. Synopsys Canada ULC provides reasonable accommodation during recruitment; contact hr-help-canada@synopsys.com for assistance.

Experience Level

Senior — requires 15+ years of semiconductor development experience with progression into engineering leadership.

Responsibilities

Accountable for program execution, technical alignment, and team development for Ethernet SerDes/PHY products.

• Lead R&D teams developing 112G/224G Ethernet SerDes and Interface PHY IP.
• Set execution plans, staffing, schedules and delivery commitments across multiple programs and customer milestones.
• Drive cross-functional alignment across architecture, analog, digital, verification, firmware, and customer support.
• Partner with product and program management to translate roadmap priorities into executable engineering plans.
• Define and enforce milestone reviews, risk management, and decision-making processes.
• Lead triage, root-cause analysis, and corrective action for customer-critical issues and escalations.
• Develop engineering talent through hiring, coaching, performance management, and succession planning.
• Promote quality practices and automation to reduce post-release issues and improve productivity.

Requirements

Core technical and leadership qualifications required to perform the role.

• Must-have: 15+ years of semiconductor development experience with progression into engineering leadership and responsibility for schedule, quality, and customer impact.
• Must-have: Proven experience leading distributed engineering teams and managing multiple stakeholders.
• Must-have: Strong understanding of SerDes PHY digital development flows including architecture, RTL, verification, firmware, integration, and release.
• Must-have: Experience with Ethernet, PCIe/CXL, or other high-speed protocols; Ethernet SerDes experience strongly preferred.
• Must-have: Track record of resolving customer escalations and driving programs to delivery under schedule pressure.
• Preferred: Experience defining milestone review and risk-management processes, and driving methodology or automation improvements.
• Preferred: Demonstrated ability to develop technical and managerial leaders through structured coaching and hiring.

Education Requirements

BS, MS, or PhD in Electrical Engineering, Computer Engineering, or a related discipline (as listed in the source posting).

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.