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Senior Director Power Architecture, Datacenter AI

Qualcomm
September 08, 2026
Full-time
On-site
San Diego, California, United States
$249,900 - $375,800 USD yearly
SoC Architecture Jobs, Level - Senior

Job Title

Senior Director Power Architecture, Datacenter AI

Role Summary

Lead pre- and post-silicon power architecture and validation for datacenter AI SoCs and systems. Work across IP, SoC, card and rack scales to define power targets, develop validation and benchmarking plans, and close the loop between silicon measurements and next-generation architecture/product decisions.

Experience Level

Senior — leadership-level role. The posting specifies senior-level qualifications with multi-decade ASIC/system experience expectations (see Education Requirements for formal years-of-experience bands).

Responsibilities

Accountable for power analysis, validation, optimization and cross-functional coordination through pre-silicon projections and post-silicon bring-up.

  • Characterize datacenter AI workloads on target systems and produce inputs for pre-silicon modeling and projections.
  • Define and execute end-to-end power analysis and benchmarking plans for complex datacenter AI systems.
  • Debug power/performance issues across pre-silicon, bring-up, validation, and production phases.
  • Define and drive optimization strategies to meet power-efficiency targets.
  • Lead cross-team test planning, coordinate execution, and track results against schedule.
  • Collaborate with design, architecture, emulation, firmware, verification and software teams for silicon readiness and evaluation.
  • Develop and improve tools, scripts, methodologies and technical processes for system power validation.

Requirements

Must-have technical skills and professional capabilities; preferred items listed separately.

  • Proven experience in pre- and post-silicon performance and power analysis of SoCs and systems.
  • Strong programming/scripting skills (C/C++ and Python recommended) for tooling and automation.
  • Experience with system-level benchmarking and workload characterization (compute, memory, IO).
  • Deep understanding of power analysis methods, power management, tuning and optimization techniques.
  • Strong analytical skills for test-plan creation, measurement analysis and debug.
  • Proven ability to lead cross-functional teams and communicate technical trade-offs to stakeholders.
  • Ability to drive technical initiatives, develop validation tooling, and improve methodologies.
  • Nice-to-have: hands-on experience with datacenter servers, memory hierarchy, interconnects, and platform benchmarking.

Education Requirements

Bachelor's, Master’s or PhD in Science, Engineering or a related field are referenced with equivalent experience allowed: the posting specifies the following equivalencies — Bachelor’s +10 years, Master’s +9 years, or PhD +8 years of relevant ASIC design/verification/validation/integration experience. Preferred fields include Computer or Electrical Engineering. Equivalent practical experience may substitute for degree requirements.


About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

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Date Posted: 2026-09-07