Job Title
Senior Director, Physical Design & Backend Engineering (HPC)
Role Summary
Lead global backend engineering for HPC SoC and MCU programs, owning RTL-to-GDS implementation, signoff, and tape-out across multiple concurrent projects. Responsible for delivery quality, meeting power/performance/area (PPA) targets, and scaling consistent execution across multiple sites.
Experience Level
Senior β approximately 20+ years of semiconductor design experience with demonstrated history leading large, global engineering teams and delivering complex SoC programs.
Responsibilities
Accountable for end-to-end backend execution, organizational scaling, and cross-functional alignment to ensure predictable silicon delivery.
- Own full lifecycle delivery from RTL through physical implementation, signoff, and tape-out.
- Ensure design closure, milestone adherence, and first-pass silicon success across programs.
- Lead and scale large, geographically distributed backend engineering teams with clear accountability.
- Drive delivery against defined PPA targets and quality/signoff criteria.
- Enable adoption of advanced process nodes; improve tools, flows, and implementation practices.
- Partner with architecture, RTL, DFT, methodology, foundries, and EDA vendors to align implementation feasibility and execution.
- Standardize processes, use metrics and KPIs for data-driven execution, and remove delivery bottlenecks.
Requirements
Must-have technical and leadership skills required to run backend execution at scale; preferred experience listed separately.
- Extensive experience leading large, multi-site engineering teams and delivering complex SoC programs.
- Deep technical expertise in RTL-to-GDSII flows: synthesis, place-and-route, timing closure, physical verification, and signoff.
- Proven track record with advanced-node implementation and signoff methodologies.
- Strong ownership for meeting PPA targets, quality, and engineering efficiency.
- Ability to standardize processes, set performance standards, and drive predictable execution using metrics.
- Excellent cross-functional collaboration and stakeholder management skills.
- Nice-to-have: experience in high-performance computing, automotive or advanced SoC domains; methodology and flow development at scale; multi-geography program leadership.
Education Requirements
Not specified.
About the Company
Company: Renesas
Headquarters: Hitachinaka, Japan
Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.

Date Posted: 2026-07-16