Senior Digital VLSI Design Engineer
BroadcomJob Title
Senior Digital VLSI Design Engineer
Role Summary
Technical lead for synthesis, DFT, and full-chip CDC/RDC sign-off of high-speed, complex IP delivered to SoC teams. Acts as the authority on synchronization strategies across multi-clock domains in advanced process nodes.
Collaborates with Architecture and Chip Lead teams to review testability, clocking and reset architectures early in the design cycle and to prevent metastability or reset-glitch issues prior to RTL freeze.
Experience Level
Senior — typically 8+ years of related VLSI digital design experience.
Responsibilities
Primary responsibilities include ownership of CDC/RDC sign-off, constraint creation, and early design reviews to ensure silicon quality.
- Define and enforce synchronization strategies and CDC/RDC sign-off across complex multi-clock domains.
- Own synthesis constraint creation and full-chip CDC/RDC methodology, including constraint and waiver management.
- Review DFT, clocking, and reset architectures with Architecture and Chip Lead teams early in the design cycle to identify metastability and reset-glitch risks before RTL freeze.
- Perform structural and functional verification of crossings and lead sign-off activities.
- Coordinate with SoC integration teams to deliver IP that meets system-level timing and reliability requirements.
- Mentor engineers on Synthesis, DFT, CDC/RDC best practices.
- Drive automation of sign-off flows for multi-site global teams.
- Resolve complex design and implementation issues during bring-up and sign-off.
Requirements
Key technical skills and experience required or preferred.
- Minimum: 8+ years of related VLSI digital design experience.
- Deep expertise in synthesis, DFT, and CDC/RDC sign-off for high-speed complex IP.
- Proven experience with structural and functional verification of clock/reset crossings using industry tools (for example: SpyGlass CDC/RDC, SpyGlass Lint, JasperGold, Meridian).
- Strong knowledge of clocking and reset architectures and experience creating constraints and managing waivers for synthesis.
- Experience mentoring engineers and driving automated sign-off flows for distributed teams.
- Preferred: experience with high-speed interfaces such as SerDes, LPDDR5/6, DDR4/5, or HBM and exposure to advanced process nodes.
Education Requirements
Bachelor of Science in Electrical Engineering (BSEE) required; Master of Science (MSEE) or PhD preferred.
About the Company
Company: Broadcom
Headquarters: Irvine, California, United States
Broadcom is a global technology leader that designs, develops, and supplies a wide range of semiconductor and infrastructure software solutions. The company is known for its innovations in wireless and broadband communications, enabling a connected world.
