Job Title
Senior Digital IP Design Engineer (f/m/d)
Role Summary
Develop digital IP and RTL for complex mixed-signal System-on-Chips as part of the Advanced Chip Engineering Digital IP team in Munich. Work on interface components, DSP subsystems, AI/ML cores and RISC-V IP, and integrate digital blocks with hardware, software and architecture teams.
Experience Level
Senior-level role. Minimum 5 years of experience in IP or subsystem design.
Responsibilities
Primary responsibilities include:
- Design and implement digital IP and logic for mixed-signal SoCs to meet architecture, performance, area and power targets.
- Collaborate with hardware, software, architecture and system engineering teams to define features, interfaces and integration points.
- Develop area- and power-optimized RTL using Verilog/SystemVerilog.
- Perform linting, CDC/RDC checks, synthesis and basic timing analysis.
- Conduct IP-level verification, basic testbench development, simulation and debugging.
- Ensure design for testability (DFT) compliance and produce design documentation; participate in design reviews.
- Troubleshoot design issues through the development lifecycle; support pre-silicon and post-silicon debug.
- Support security-related tasks; work may require adherence to security certification processes.
- Stay current with industry tools, methodologies and AI-based design assistance tools.
Requirements
Must-have technical skills and experience:
- Minimum 5 years of IP or subsystem design experience.
- Solid understanding of microprocessor architecture, interconnects and cache coherency.
- Hands-on CPU design experience (proprietary cores, RISC-V, or AI/ML accelerators).
- Experience with AMBA protocols (AHB, AXI, ACE, CHI) and memory systems (ROM, RAM, Flash, DDR/LPDDR).
- Advanced knowledge of Verilog, SystemVerilog and C/C++.
- Proficiency in scripting languages such as Python, Perl, TCL or Shell.
- Experience with pre-silicon (simulation/emulation/FPGA) and post-silicon debugging.
- Familiarity with lint, CDC/RDC, synthesis and basic timing analysis flows; DFT awareness.
- Strong analytical, problem-solving and written/verbal communication skills in English.
Nice-to-have:
- Experience using AI-based tools to enhance development and design efficiency.
- Basic conversational German.
Education Requirements
Bachelor's or Master’s degree in Electrical Engineering, Computer Science or a related technical field.
About the Company
Company: NXP Semiconductors
Headquarters: Nijmegen, Netherlands
NXP Semiconductors N.V. is a global semiconductor company that provides High Performance Mixed Signal and Standard Product solutions. With over 45,000 employees and operations in more than 35 countries, NXP is a leader in secure connectivity solutions for embedded applications, catering to automotive, industrial IoT, mobile, and communication infrastructure markets. The company is committed to innovation and sustainability, advancing a smarter, safer, and more sustainable world through technology.

Date Posted: 2026-06-12