Senior Digital IC Designer

Job Title

Senior Digital IC Designer

Role Summary

Senior member of Marvell's Connectivity digital IC design team responsible for delivery of RTL and participation across the chip design flow for high‑performance connectivity products (DSP, FEC, SerDes, gearbox) targeting data center, cloud and optical applications. Work includes RTL development, block-level analysis, and cross-discipline collaboration to ensure tapeout quality.

Experience Level

Senior-level. The role requires independent ownership of tasks and mentoring of junior engineers. Exact years of experience are not specified in the posting.

Responsibilities

Primary responsibilities include design, verification, and cross-team coordination for digital blocks used in high-speed connectivity devices.

• Develop and verify RTL blocks (SystemVerilog/Verilog/VHDL) for DSP, FEC, SerDes and gearbox functions.
• Perform circuit analysis and functional simulations to evaluate performance, area and power (PPA).
• Apply established design methodologies for synthesis, static timing analysis (STA), and DFT.
• Debug and resolve moderately complex technical issues; exercise independent judgment to identify solutions.
• Collaborate with Physical Design, Verification, and Product Engineering to ensure tapeout readiness.
• Participate in design reviews and project meetings; document technical results and share knowledge.
• Support and mentor junior engineers on project tasks and design methodologies.

Requirements

Core technical must-haves and useful additional skills for successful performance in this role.

• Must-have: Hands-on experience with digital RTL design (SystemVerilog, Verilog or VHDL).
• Must-have: Experience with EDA tools for synthesis, static timing analysis and simulation (examples: Synopsys, Cadence).
• Must-have: Familiarity with functional verification methodologies and design-for-test (DFT).
• Must-have: Comfortable working in Linux and using scripting languages (Python, Perl, Tcl) for automation.
• Must-have: Solid understanding of digital circuit fundamentals, sequential and combinational logic.
• Nice-to-have: Experience with high-speed designs (SerDes, DSP, FEC, PAM4/coherent) and end-to-end tapeout flows.
• Nice-to-have: Knowledge of advanced CMOS nodes (5nm / 3nm / 2nm).
• Soft skills: Effective team communication in international, multidisciplinary settings; quality- and delivery-oriented mindset; proactive learner and knowledge sharer.

Education Requirements

Master's degree (or equivalent) in Electrical Engineering, Electronics Engineering, Computer Engineering or a related field; alternatively a Bachelor's degree with at least 1–3 years of relevant professional experience. Equivalent practical experience is accepted where noted.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.