Senior Digital Design Verification Engineer

Job Title

Senior Digital Design Verification Engineer

Role Summary

Join the verification team for complex power-management SoCs that combine digital control, telemetry, fault management, communication interfaces, configurable peripherals, and advanced power-control functions. The engineer will independently own verification of significant blocks or major SoC features from planning through closure.

Work involves hands-on SystemVerilog/UVM development, coverage-driven verification, complex debug, automation, and cross-functional collaboration with architecture, RTL design, firmware, analog, validation, and systems teams.

Experience Level

Senior - typically requires 4 or more years of relevant digital design verification experience (or equivalent directly applicable experience).

Responsibilities

The role is responsible for planning, implementing, and closing verification for complex digital blocks and system features.

• Own verification of complex digital blocks or major SoC features from requirements analysis through coverage closure.
• Develop feature-based verification plans from product, architecture, and microarchitecture specifications; identify gaps and risks.
• Build and extend reusable SystemVerilog/UVM environments, including sequences, monitors, scoreboards, checkers, assertions, and coverage models.
• Develop constrained-random and targeted tests for normal operation, error handling, recovery, and system-level interactions.
• Drive functional, code, toggle, FSM, and assertion coverage closure using regression and coverage data.
• Debug RTL, testbench, assertion, integration, and regression failures; collaborate with design and firmware teams to isolate issues and verify fixes.
• Automate regression, triage, reporting, and analysis workflows using scripting and engineering tools.
• Communicate status, risks, dependencies, and closure evidence clearly; provide technical guidance to less-experienced engineers.

Requirements

Must-have skills and experience required to perform the role.

• 4+ years of relevant digital design verification experience, or equivalent directly applicable experience.
• Proven ownership of a complex block, subsystem, or major feature from verification planning through closure.
• Strong proficiency in SystemVerilog, UVM, constrained-random verification, functional coverage, and SystemVerilog Assertions (SVA).
• Experience translating specifications into test plans, scenarios, checkers, scoreboards, assertions, coverage models, and closure criteria.
• Hands-on experience developing and debugging reusable UVM environments and analyzing complex regression failures.
• Strong RTL and testbench debug skills with the ability to distinguish design, environment, test, firmware, and specification issues.
• Working knowledge of digital design fundamentals: state machines, clocks/resets, interrupts, register interfaces, memories, and clock-domain crossings.
• Proficiency in Linux and at least one scripting language such as Python, Bash, Perl, or Tcl.
• Ability to work independently and collaborate across architecture, design, firmware, analog, validation, and systems teams.

Preferred / nice-to-have:

• Experience verifying complex SoCs, power-management ICs, voltage regulators, digital controllers, or mixed-signal products.
• Experience verifying RTL interfaces to embedded processors, memory-mapped peripherals, and firmware-controlled hardware features.
• Familiarity with PMBus, AVSBus, SVID/SVI3, I2C, SPI, or similar control and communication protocols.
• Understanding of telemetry, fault/alert handling, power sequencing, multiphase regulation, or digital control loops.
• Experience with tools such as Cadence Xcelium, SimVision, vManager, JasperGold, Synopsys VCS, Verdi, or similar.
• Experience with formal verification, gate-level simulation, silicon bring-up, or pre-silicon-to-silicon correlation.
• Experience improving regression infrastructure, coverage analytics, failure triage, or verification automation.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field is stated; the posting also accepts equivalent directly applicable experience in place of formal degrees.

About the Company

Company: Renesas

Headquarters: Hitachinaka, Japan

Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.