Senior Digital Design Engineer

Job Title

Senior Digital Design Engineer

Role Summary

Design and deliver digital IP blocks for SoC products (DDR, display, high-speed links, cores, memory controllers, interconnect) with focus on RTL implementation, verification collaboration, and documentation. The role works on an Austin-based Digital IP team supporting subsystem and SoC integration, validation, and customers.

Experience Level

Senior — minimum 4 years of experience in IP or SoC design; expects demonstrated SoC/IP delivery and cross-functional collaboration.

Responsibilities

Primary responsibilities include RTL design, verification collaboration, and delivery of production-ready IP.

• Review architecture, microarchitecture, programming model, and interface specifications and trace requirements to design.
• Plan IP design and documentation, provide schedule and milestone assessments, and track development metrics (coverage, defects, milestones).
• Implement RTL in Verilog/SystemVerilog to meet functional, timing, and quality requirements.
• Collaborate with verification teams to develop test plans and achieve required coverage and quality standards.
• Perform and act on design-quality checks (lint, CDC analysis, static timing analysis) and work with tools teams to improve verification methods.
• Integrate IP with SoC front-end teams and support emulation, silicon validation, and applications engineering.
• Support root-cause analysis of field failures and provide mitigations or workarounds to customers and validation teams.
• Deliver RTL, verification artifacts, and supporting documentation for production handoff.

Requirements

Required and preferred technical skills and experience.

• Must-have: Minimum 4 years of IP or SoC design experience; strong knowledge of SoC architecture.
• Must-have: Expert knowledge of Verilog and experience developing RTL (SystemVerilog experience expected from role context).
• Must-have: Experience with design quality checks and tools: lint, CDC analysis, static timing analysis (STA).
• Nice-to-have: Familiarity with ARM AMBA bus protocols.
• Nice-to-have: Knowledge of functional safety standards (ISO 26262) and CPU/cache architecture.
• Nice-to-have: C programming and scripting experience (Perl, Python) for automation and testbench support.

Education Requirements

Minimum B.S. in Electrical Engineering (BSEE), Computer Engineering (BSCE), or Computer Science (BSCS).

About the Company

Company: NXP Semiconductors

Headquarters: Nijmegen, Netherlands

NXP Semiconductors N.V. is a global semiconductor company that provides High Performance Mixed Signal and Standard Product solutions. With over 45,000 employees and operations in more than 35 countries, NXP is a leader in secure connectivity solutions for embedded applications, catering to automotive, industrial IoT, mobile, and communication infrastructure markets. The company is committed to innovation and sustainability, advancing a smarter, safer, and more sustainable world through technology.