Senior DFT & Post-Silicon Lead

Job Title

Senior DFT & Post-Silicon Lead

Role Summary

Lead the DFT implementation and post-silicon validation activities for complex SoCs and chiplets-in-package, coordinating with IP providers, EDA vendors, and cross-functional teams to deliver production-ready devices.

Experience Level

Senior-level engineering role. (Posting identifies the position as a senior/lead role.)

Responsibilities

Own technical direction, delivery, and continuous improvement of DFT and post-silicon validation across the product lifecycle.

• Lead and mentor DFT and post-silicon engineering teams; provide technical direction and performance management.
• Define and implement DFT architectures (scan chains, BIST, JTAG) and debug infrastructure for SoCs and SiPs.
• Develop and execute test plans and strategies at silicon, package, and system levels, from pre-silicon to mass production.
• Define and develop automated production and characterization test solutions to ensure required test coverage.
• Collaborate with design, validation, packaging, operations, and product management to ensure manufacturability and customer requirements are met.
• Drive process improvements, yield optimization, and cost-reduction initiatives in test and production flows.
• Coordinate with external IP providers and EDA vendors to integrate test solutions and flows.

Requirements

Key technical and leadership requirements. Must-have items listed first; a small number of preferred skills follow.

• Must-have: Proven experience with multiple tape-outs of high-performance SoCs or SiPs intended for mass production.
• Must-have: Strong background in post-silicon test optimization and yield analysis.
• Must-have: Experience defining and implementing test strategies for high-volume production.
• Must-have: Proficiency in RTL and testbench development using SystemVerilog and Verilog.
• Must-have: Strong scripting skills (Shell, Tcl, Python3).
• Must-have: Demonstrated experience leading engineering teams and providing technical direction.
• Must-have: Experience working with external IP providers and EDA vendors and integrating test flows into design/implementation flows.
• Nice-to-have: Hands-on experience with Tessent and SSN methods and their integration into advanced-node EDA flows.

Education Requirements

Bachelor's, Master's, or PhD in Computer Science, Electrical Engineering, or a related technical field.

About the Company

Company: TechBiz Global

TechBiz Global provides recruitment and staffing services, connecting talent with clients across engineering and technology sectors. They specialize in sourcing professionals for roles in semiconductor design, validation, and related technical fields.