Senior DFT Engineer

Job Title

Senior DFT Engineer

Role Summary

Work on Design-for-Test (DFT) product engineering within the Test Group to develop, validate, and automate DFT features and test flows for ASICs across domains such as AI, automotive, mobile, and high-performance computing.

Collaborate with product engineering, R&D, and customer teams to build scalable, production-ready DFT solutions and improve tool quality and performance.

Experience Level

Mid-level — requires 3+ years of relevant DFT or ASIC test experience.

Responsibilities

Primary responsibilities include designing and automating tests, debugging flows, and validating DFT features.

• Develop and automate detailed test plans and test cases using Verilog, SystemVerilog, or VHDL.
• Review specifications and test plans; provide technical feedback to ensure feature completeness.
• Create in-house test cases and prototype flows for compression, ATPG (including transition delay and cell-aware faults), MBIST, and diagnostics.
• Perform quality-of-results analysis, troubleshooting, and root-cause analysis across the ASIC flow (synthesis to sign-off).
• Conduct diagnostics and debugging to improve tool reliability, performance, and customer experience.
• Work with AI agents to create or review assistive/generative documentation and manage performance/installation testing.

Requirements

Technical must-haves and useful additions for successful performance in the role.

• Must-have: Hands-on experience with DFT technologies such as JTAG, MBIST, Scan, and ATPG.
• Must-have: Proficiency in RTL coding (Verilog, SystemVerilog, and/or VHDL).
• Must-have: Advanced scripting skills for automation and tool integration (Python, Perl, Tcl/Tk or similar).
• Must-have: Solid understanding of the ASIC design flow including design planning, synthesis, physical design, and sign-off verification.
• Nice-to-have: Experience with DFT compression, diagnostics, or AI-enabled test automation.
• Nice-to-have: Familiarity with change-management/version-control tools (for example, Perforce).
• Behavioral: Strong debugging, troubleshooting, documentation, and cross-team communication skills.

Education Requirements

Bachelor's, Master's, or MTech in Electrical/Electronics Engineering, Computer Science, or a related technical field. The role expects 3+ years of relevant DFT or ASIC test experience.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.