Job Title
Senior DFT Engineer (ATPG, MBIST, IO Test, Clock Verification)
Role Summary
Work with NVIDIA teams to architect and deliver Design for Testability solutions for high-performance GPU and SoC designs. Focus areas include ATPG development, MBIST, IO test planning, and clock DFT/verification to improve coverage, yield, and silicon reliability.
Collaborate with RTL, physical design, verification, and product engineering across pattern simulation, silicon bring-up, and manufacturing test debug to enable first-time-right silicon.
Experience Level
Senior level β typically 4+ years of hands-on DFT/ATPG experience for SoC or ASIC designs.
Responsibilities
Key responsibilities include:
- Architect and validate DFT solutions to improve controllability and observability in GPU/SoC designs
- Lead scan-based DFT implementation: scan insertion, compression, and test logic integration
- Develop and debug ATPG patterns for stuck-at, transition, and other fault models
- Implement and support MBIST architectures for on-chip memory test and diagnostics
- Plan and validate IO tests to ensure reliable interface and pin-level testing
- Support clock DFT and clock verification, including at-speed test enablement
- Analyze fault coverage reports and optimize trade-offs among power, performance, and area
- Support pattern simulation, silicon bring-up, manufacturing test debug, and yield ramp
- Perform root-cause analysis for test escapes and manufacturing failures
- Document DFT methodologies, test strategies, and best practices
Requirements
Required and preferred qualifications:
Must-have:
- 4+ years of hands-on DFT and ATPG experience for SoC or ASIC designs
- Deep understanding of DFT fundamentals: controllability, observability, and scan testing
- Proven expertise in ATPG pattern generation, analysis, and debug
- Experience with MBIST architectures, memory test and diagnostics
- Knowledge of IO test methodologies and pin-level validation
- Solid understanding of clock DFT and clock verification concepts
- Strong grasp of digital design and RTL fundamentals
- Experience with industry-standard DFT/ATPG EDA tools
- Strong analytical, problem-solving, and communication skills
Nice-to-have:
- Experience with silicon bring-up and production test support
- Exposure to advanced process nodes and complex SoC/GPU architectures
- Experience with low-power, performance-aware DFT techniques
- Experience supporting high-volume manufacturing and yield optimization
Education Requirements
Bachelor's degree (e.g., B.Tech, BE) in Electronics or a related field, or equivalent degree; equivalent practical experience acceptable.
About the Company
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.

Date Posted: 2026-06-03