Senior DFT Engineer, Architecture

Job Title

Senior DFT Engineer, Architecture

Role Summary

Design and implement design-for-test (DFT) strategies and test features for high-speed CPU core SoCs and multi-chiplet system-in-package projects. Work with RTL, physical design, verification, and external partners across Tenstorrent's global engineering teams to ensure manufacturability and efficient silicon debug.

Experience Level

Senior — requires at least 10 years of relevant industry experience.

Responsibilities

Primary responsibilities focus on planning, inserting, verifying, automating, and supporting brought-up test features across the chip and package.

• Define and implement chip-level DFT strategy for SoC and chiplet integration.
• Insert and verify scan chains, memory BIST, JTAG, and other test infrastructure.
• Collaborate with RTL, physical design, and verification teams to improve testability throughout the design flow.
• Develop scripts and automation for DFT flows using industry EDA tools.
• Run ATPG, analyze fault coverage reports, and act on coverage gaps.
• Support silicon bring-up and debug related to test features.
• Perform formal verification and signoff of inserted DFT logic.
• Communicate status, risks, resource needs, and progress to cross-functional stakeholders.

Requirements

Must-have technical skills and experience, followed by preferred qualifications.

• Minimum 10 years of hands-on industry experience in DFT for complex SoC designs.
• Proven experience with commercial DFT tools (e.g., Synopsys, Siemens/Siemens EDA, Cadence) and DFT flows.
• Strong scripting skills for automation (TCL, Python, or similar).
• Experience with ATPG generation and fault coverage analysis and addressing coverage gaps.
• Experience supporting silicon bring-up and debug related to test features.
• Experience coordinating DFT with RTL, physical design, and verification teams.
• Familiarity with advanced silicon technologies and methodologies for optimizing test coverage.
• Strong verbal and written English communication and collaboration skills.
• Ability to develop DFT plans, monitor key indicators, scope risk, and deliver on schedule in a complex decision space.
• Employment may be contingent on eligibility to access U.S. export-controlled technology; candidates may need appropriate citizenship, permanent residency, or license approval.

Nice-to-have

• Fluency in Japanese.
• Possession of a valid Japanese work visa.

Education Requirements

Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a closely related technical field.

About the Company

Company: Tenstorrent

Headquarters: Austin, Texas, United States

Tenstorrent is a technology company focused on designing innovative computing solutions. They are known for their expertise in the development of advanced hardware, including ASICs and SoCs, aimed at enhancing performance and efficiency in various applications.