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Senior DFT Design Engineer, AWS Machine Learning Acceleration

Amazon
September 14, 2026
Full-time
On-site
Austin, Texas, United States
$159,200 - $215,300 USD yearly
DFT Jobs, Level - Senior

Job Title

Senior DFT Design Engineer, AWS Machine Learning Acceleration

Role Summary

Design and optimize Design-for-Test (DFT) architectures for custom AWS machine-learning SoCs (Inferentia, Trainium) and ensure testability from RTL through silicon bring-up. Work within the Cloud-Scale Machine Learning Acceleration team and collaborate with block designers, physical design, architecture, and product engineering.

Experience Level

Senior - the posting specifies 5+ years of practical semiconductor ASIC design experience.

Responsibilities

Primary responsibilities include defining and delivering DFT solutions and coordinating across design and validation teams.

  • Define and develop DFT architectures for advanced process nodes.
  • Collaborate with block designers and physical design teams to implement efficient DFT solutions.
  • Integrate ATPG, MBIST, JTAG, and scan strategies while balancing test quality and test time.
  • Act as primary DFT contact for cross-functional stakeholders to align schedules and goals.
  • Lead DFT implementation from RTL through silicon bring-up and post-silicon validation activities.
  • Mentor and develop junior engineers via code reviews, methodology training, and technical guidance.
  • Manage project timelines and deliverables for DFT tasks.

Requirements

Key technical must-haves and preferred skills for successful candidates.

Must-have:

  • 5+ years of semiconductor ASIC design experience including end-to-end ownership of major SoC blocks.
  • Practical knowledge of DFT tools and practices such as ATPG, JTAG, MBIST, and scan methodologies.
  • Experience developing automation scripts for design and test flows.

Nice-to-have / Preferred:

  • RTL coding and debug experience, and performing performance/power/area trade-off analysis.
  • Experience with modern ASIC/FPGA design and verification tools and gate-level testing.
  • System-on-Chip bring-up and post-silicon validation experience; practical silicon debug skills.
  • Experience with multi-clock design practices (CDC), STA constraints for DFT modes, and DV simulation methodologies.
  • Strong scripting/programming skills (Perl, Python, Tcl).

Education Requirements

Required: Bachelor's degree in computer science, electrical engineering, or a related technical field. Preferred: Master's or Ph.D. in electrical engineering, computer science, or a related field.


About the Company

Company: Amazon

Headquarters: Seattle, Washington, United States

Amazon is a global leader in e-commerce and cloud computing, committed to delivering fast, reliable services across diverse sectors. The company's innovative technologies include AWS, Kindle, and Echo, as well as developing low Earth orbit satellite networks for improved internet connectivity worldwide.

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Date Posted: 2026-09-14