Senior Design Verification Engineer – High Performance CPU Core

Job Title

Senior Design Verification Engineer – High Performance CPU Core

Role Summary

Drive functional verification for high-performance out-of-order CPU core blocks through core-level integration. Work with architecture, RTL, performance, and verification teams to verify design intent, identify risks early, and achieve signoff-quality verification.

Experience Level

Senior. The posting specifies a baseline of 3+ years of relevant IP, CPU/core, or SoC functional verification experience.

Responsibilities

Key responsibilities include planning and executing verification for assigned CPU core areas and contributing reusable verification infrastructure.

• Own verification planning and execution from block-level to core-level integration.
• Create verification strategies and test plans based on CPU architecture and microarchitecture.
• Develop and maintain verification environments, testbenches, checkers, scoreboards, assertions, stimulus, and coverage models.
• Define and run directed and constrained-random tests targeting branch prediction, instruction fetch, pipeline interactions, issue/dispatch behavior, hazards, load/store ordering, memory consistency, and hardware prefetch.
• Analyze failures, isolate root cause, and drive fixes in RTL, testbench infrastructure, assertions, and test content.
• Collaborate with architecture and design teams to clarify specifications and improve debugability.
• Write and analyze functional coverage and close coverage gaps to reach verification signoff criteria.
• Contribute to reusable DV methodology, automation, and infrastructure to improve team productivity.

Requirements

Must-have skills and experience; preferred items listed as nice-to-have.

• Must-have: 3+ years of relevant experience in IP, CPU/core, or SoC functional verification, preferably with CPU/core verification experience.
• Must-have: Strong hands-on experience with SystemVerilog and UVM-based verification methodologies.
• Must-have: Solid understanding of computer architecture and CPU microarchitecture fundamentals.
• Must-have: Experience with test planning, testbench development, constrained-random verification, failure analysis, coverage analysis, and coverage closure.
• Must-have: Strong debug skills and the ability to translate architectural intent into verification strategy and execution.
• Must-have: Strong programming and scripting fundamentals for building scalable verification solutions.
• Nice-to-have: Direct experience with high-performance out-of-order core verification and areas such as Frontend, Midcore, Load-Store Unit, memory ordering/consistency, or hardware prefetch.
• Nice-to-have: Familiarity with formal verification, emulation, or performance-oriented verification flows.
• Nice-to-have: Experience building reusable infrastructure and collaborating across architecture, performance, compiler, system verification, and software teams.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.

About the Company

Company: SiFive

Headquarters: San Mateo, California, United States

SiFive is a pioneering company in the RISC-V ecosystem, focused on transforming the future of computing by delivering high-performance, data-intensive RISC-V solutions. Their compute platforms empower leading technology firms to innovate across various markets, including AI, machine learning, and automotive sectors. SiFive is recognized for its commitment to ongoing innovation and fostering collaboration among talented teams, impacting lives by enabling advanced chip design.