Senior Design Verification Engineer - High Performance CPU Core

Job Title

Senior Design Verification Engineer - High Performance CPU Core

Role Summary

Senior design verification engineer responsible for functional verification of high-performance out-of-order CPU core blocks and core-level integration. Collaborates with architecture, RTL, performance, and verification teams to define verification strategy, uncover risks early, and deliver signoff-quality verification.

Experience Level

Senior-level. The posting requests 3+ years of relevant experience in IP, CPU/core, or SoC functional verification.

Responsibilities

Primary responsibilities include planning, implementing, and executing verification for CPU core units and driving effective debug and closure.

• Own verification planning and execution from block-level to core integration for assigned CPU areas.
• Create verification strategies and test plans based on CPU architecture and microarchitecture.
• Develop and maintain verification environments: testbenches, checkers, scoreboards, assertions, and coverage models.
• Define and run directed and constrained-random tests targeting branch prediction, instruction fetch, pipeline interactions, issue/dispatch behavior, hazards, load/store ordering, memory consistency, and prefetch behavior.
• Analyze failures, isolate root cause, and drive fixes across RTL, testbench infrastructure, and tests.
• Collaborate with architecture and design teams to clarify specifications and improve debugability.
• Write and close functional coverage to achieve verification completeness and signoff quality.
• Contribute reusable DV methodology, automation, and infrastructure for future core generations.

Requirements

Must-have technical skills and experience for immediate contribution.

• Hands-on experience with SystemVerilog and UVM-based verification methodologies.
• Solid understanding of computer architecture and CPU microarchitecture fundamentals.
• Experience with test planning, testbench development, constrained-random verification, failure analysis, coverage analysis, and coverage closure.
• Strong debug skills and ability to translate architectural intent into effective verification strategy and execution.
• Proficiency in programming and scripting to build scalable verification solutions.

Nice-to-have:

• Direct experience verifying high-performance out-of-order cores.
• Experience in Frontend, Midcore, Load-Store Unit, memory ordering/consistency, or hardware prefetch verification.
• Familiarity with formal verification, emulation, or performance-oriented verification flows.
• Experience building reusable infrastructure and improving team-wide verification methodology.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.

About the Company

Company: SiFive

Headquarters: San Mateo, California, United States

SiFive is a pioneering company in the RISC-V ecosystem, focused on transforming the future of computing by delivering high-performance, data-intensive RISC-V solutions. Their compute platforms empower leading technology firms to innovate across various markets, including AI, machine learning, and automotive sectors. SiFive is recognized for its commitment to ongoing innovation and fostering collaboration among talented teams, impacting lives by enabling advanced chip design.