Senior Design Verification Engineer

Job Title

Senior Design Verification Engineer

Role Summary

Join Microsoft Silicon within Cloud Hardware and Infrastructure Engineering to develop and deliver verification solutions for SoC/IP used in Microsoft cloud infrastructure. The role focuses on pre-silicon functional verification, emulation, and post-silicon validation to improve quality, delivery, and scalability of hardware used in Microsoft datacenters.

Experience Level

Senior level. Typical candidates have 5+ years of industry verification or relevant engineering experience; preferred profiles list 6+ years of verification and architecture experience.

Responsibilities

Key responsibilities include designing and executing verification strategies and maintaining scalable verification infrastructure.

• Build, validate, and optimize hardware emulation models (preferred platforms include Zebu and Palladium) with focus on runtime efficiency.
• Develop verification environments and test suites for block, chip, and system-level functional verification and post-silicon validation.
• Collaborate with architects and designers to define verification plans, strategies, and requirements for IP/subsystem/SoC verification.
• Create comprehensive test plans and develop tests to achieve feature and coverage goals.
• Implement verification components: scoreboards, sequences, constrained-random tests, assertions, and coverage models.
• Debug and triage failures in testbenches, simulations, and emulation environments.
• Develop Makefiles and automation scripts to enable scalable verification flows and CI integration.
• Participate in Agile practices: code reviews, sprint planning, and continuous integration.
• Work effectively with cross-functional and geographically distributed teams.

Requirements

Must-have technical skills and conditions for consideration.

• Proven experience creating emulation and simulation environments, developing tests, and debugging silicon IPs or systems.
• Experience with chip and/or computer architecture.
• Proficiency in Verilog, C/C++, and scripting languages such as Python, Ruby, or Perl.
• Deep knowledge of verification principles, testbenches, stimulus generation, SystemVerilog, UVM, and coverage closure.
• Experience with hardware emulation or FPGA-based flows.
• Familiarity with firmware development (secure and non-secure boot flows) and ability to write synthesizable RTL is a plus.
• Software development experience and ability to produce automation and build scripts for verification flow.
• Strong debugging and problem-solving skills; ability to triage failures across simulation and emulation platforms.
• Ability to meet Microsoft security screening requirements and to handle export-controlled information; successful candidates must provide proof of citizenship or lawful US residency/status when required for export control assessment.

Education Requirements

Doctorate (PhD) in Electrical Engineering, Computer Engineering, Computer Science, or related field (with 1+ years technical experience) OR Master’s degree in those fields (with 4+ years technical experience) OR Bachelor’s degree in those fields (with 5+ years technical experience), or equivalent practical experience. Fields cited include Electrical Engineering, Computer Engineering, and Computer Science; equivalent experience is explicitly accepted.

About the Company

Company: Microsoft

Headquarters: Redmond, Washington, United States

Microsoft is a global technology company that develops and sells software, services, devices, and solutions. Known for its Windows operating system, Office suite, and Azure cloud platform, Microsoft aims to empower individuals and organizations around the world to achieve more. The company fosters a culture of innovation and inclusion, focusing on delivering trusted experiences to customers and partners globally.