Senior Design Verification Engineer

Job Title

Senior Design Verification Engineer

Role Summary

The Senior Design Verification Engineer will develop and execute verification strategies for digital modem and PHY/MAC designs, build scalable test environments, and debug complex issues through pre-silicon and silicon bring-up. The role is part of the Wireless PHY/MAC team working with system architects, analog/RF designers, firmware engineers, and product teams to deliver low-power wireless SoCs.

Base pay range: $124,600 - $231,400 USD (annualized base pay).

Experience Level

Senior - typically 3–6 years of experience in digital design verification (modem or wireless PHY experience preferred).

Responsibilities

Primary responsibilities include planning and executing verification activities and collaborating across engineering disciplines to ensure correct system behavior.

• Define and execute verification strategies for digital modem designs across wireless use cases.
• Develop and maintain scalable verification environments using SystemVerilog/UVM or similar methodologies.
• Create test plans, testbenches, and stimuli to achieve functional and coverage goals.
• Debug and analyze design issues; work closely with design and architecture teams to resolve root causes.
• Track and drive functional and code coverage to closure.
• Collaborate with firmware, validation, and system teams to verify end-to-end system behavior.
• Support silicon bring-up and correlate pre-silicon verification with post-silicon results.
• Improve verification methodologies, tools, and automation workflows.

Requirements

Must-have technical skills and experience required to perform the role.

• Solid understanding of digital design fundamentals and verification concepts.
• 3–6 years of experience in digital design verification, preferably focused on modem or wireless PHY designs.
• Proficiency with SystemVerilog and UVM or similar verification methodologies.
• Strong debugging skills with experience analyzing simulation results and identifying root causes.
• Familiarity with scripting for automation (Python or Perl).
• Basic understanding of wireless communication systems or digital signal processing concepts.
• Strong problem-solving skills and ability to work effectively in a collaborative team environment.

Nice-to-have:

• Experience verifying wireless standards such as BLE, Wi‑Fi, Zigbee, or similar.
• Advanced verification techniques: constrained-random, coverage-driven verification, SystemVerilog assertions (SVA).
• Familiarity with C/C++ or MATLAB for algorithm modeling and reference model development.
• Experience with mixed-signal or system-level verification, including co-simulation with analog/RF components.
• Exposure to post-silicon validation, lab bring-up, and correlation with pre-silicon results.
• Experience with low-power design verification and power-aware methodologies.

Education Requirements

Bachelor of Science in Electrical Engineering (BSEE), Computer Engineering (BCE/CE) or a related technical field.

About the Company

Company: Silicon Labs

Headquarters: Austin, Texas, USA

Silicon Labs is a leading innovator in low-power wireless connectivity, creating embedded technology that connects devices to improve lives. With a focus on advanced edge connectivity applications, the company provides device makers with cutting-edge solutions and support. Headquartered in Austin, Texas, Silicon Labs operates in over 16 countries, serving markets such as smart home, industrial IoT, and smart cities.