Skip to main content
Silicon Labs logo

Senior Design Verification Engineer

Silicon Labs
October 5, 2026
Full-time
On-site
Austin, Texas, United States
$124,600 - $231,400 USD yearly
Verification Jobs, Level - Senior

Job Title

Senior Design Verification Engineer

Role Summary

Senior Design Verification Engineer on the Wireless PHY/MAC team in Austin responsible for validating digital modem designs for low-power wireless SoCs. The role covers verification strategy, testbench and stimulus development, coverage closure, debugging, and silicon bring-up in collaboration with design, firmware, and system teams.

Work directly supports wireless connectivity products used in smart home, industrial IoT, and related applications.

Experience Level

Senior - the posting specifies 3–6 years of experience in digital design verification with emphasis on modem or wireless PHY designs.

Responsibilities

Primary responsibilities include planning and executing verification activities and collaborating across engineering disciplines to close functional and coverage gaps.

  • Define and execute verification strategies for digital modem designs across key wireless use cases.
  • Develop and maintain scalable verification environments using SystemVerilog/UVM or similar methodologies.
  • Create test plans, testbenches, and stimuli to achieve functional and coverage closure.
  • Debug and analyze design issues; work with design and architecture teams to resolve root causes.
  • Track and drive functional and code coverage to ensure verification completeness.
  • Collaborate with firmware, validation, and system teams to validate system behavior.
  • Support silicon bring-up and correlate pre-silicon verification with post-silicon results.
  • Improve verification methodologies, tools, and automation workflows.

Requirements

Must-have technical skills and experience; preferred items listed separately.

  • Solid understanding of digital design fundamentals and verification concepts.
  • 3–6 years of experience in digital design verification (modem/wireless PHY experience preferred).
  • Experience with SystemVerilog and UVM or similar verification methodologies.
  • Strong debugging skills and experience analyzing simulation results to identify root causes.
  • Familiarity with scripting languages such as Python or Perl for automation.
  • Basic understanding of wireless communication systems or digital signal processing concepts.
  • Ability to work effectively in cross-functional teams.

Nice-to-have:

  • Experience verifying wireless standards such as BLE, Wi‑Fi, Zigbee, or similar technologies.
  • Advanced verification techniques: constrained-random, coverage-driven verification, SVA.
  • Familiarity with C/C++ or MATLAB for algorithm modeling and reference models.
  • Experience with mixed-signal or system-level verification and co-simulation with analog/RF.
  • Exposure to post-silicon validation, lab bring-up, and correlation with pre-silicon results.
  • Experience with low-power design verification and power-aware methodologies.

Education Requirements

Bachelor’s degree in Electrical Engineering (BSEE), Computer Engineering (BCE), or a related technical field is specified.


About the Company

Company: Silicon Labs

Headquarters: Austin, Texas, USA

Silicon Labs is a leading innovator in low-power wireless connectivity, creating embedded technology that connects devices to improve lives. With a focus on advanced edge connectivity applications, the company provides device makers with cutting-edge solutions and support. Headquartered in Austin, Texas, Silicon Labs operates in over 16 countries, serving markets such as smart home, industrial IoT, and smart cities.

Silicon Labs logo

Date Posted: 2026-10-02