Senior Design Verification Engineer

Job Title

Senior Design Verification Engineer

Role Summary

As an IP Design Verification Engineer on the Silicon Chassis team in Bangalore, you will develop and execute verification for complex IP logic, build testbenches and environments, and collaborate with architects, RTL developers, and physical-design teams to ensure correctness and integration.

Work focuses on IP-level verification using advanced methodologies to validate interconnects, coherency, and high-speed interfaces for production silicon.

Experience Level

Senior — requires 4+ years' IP-level design verification experience with a Bachelor's degree, or 3+ years with a Master's degree.

Responsibilities

Primary responsibilities include planning, implementing, and executing verification activities and improving verification infrastructure.

• Develop and execute detailed verification plans for IP logic against microarchitectural specifications.
• Design and maintain testbenches and verification environments using SystemVerilog and OVM/UVM.
• Perform functional and system-level simulations; measure and drive coverage closure.
• Debug failing tests, perform root-cause analysis, and implement corrective fixes.
• Collaborate with architects, RTL developers, and physical-design teams for integration and technical reviews.
• Analyze power and timing impacts during verification to support design optimization.
• Document verification plans, methodologies, and results; lead or participate in technical reviews.
• Maintain and enhance verification infrastructure and tool flows.

Requirements

Must-have technical skills and experience for immediate productivity.

• Proficiency in SystemVerilog and hardware simulation.
• Strong experience with OVM/UVM and advanced verification methodologies.
• Experience developing and executing IP test plans and creating verification environments.
• Familiarity with interconnect/bus protocols such as AMBA AXI/ACE/CHI, PCIe, or CXL and cache coherency concepts.
• Experience with root-cause debugging and verification-driven defect resolution.
• Experience analyzing power and timing during verification.
• Ability to drive technical reviews and collaborate effectively across cross-functional teams.
• Design for Verification (DFV) experience is preferred.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Science, or a related technical field. The posting specifies 4+ years' experience with a Bachelor's degree or 3+ years with a Master's degree.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.