Senior Design Engineer - IP Office

Job Title

Senior Design Engineer - IP Office

Role Summary

Senior individual contributor on Microsoft's Artificial Intelligence Silicon Engineering team responsible for managing semiconductor IP selection, acquisition, release, and integration for AI SoC programs. The role drives cross-functional execution, resolves pre- and post-silicon IP issues, and ensures IP quality and timely delivery to SOC integration teams.

Experience Level

Senior-level. The posting specifies degree-plus-experience options (PhD +1 year, MS +4 years, BS +5 years) or equivalent professional experience.

Responsibilities

Key responsibilities include coordinating IP lifecycle, quality, and integration across teams and vendors.

• Drive IP selection, qualification, acquisition (license/SOW), and adoption aligned with AI SoC product requirements.
• Manage IP release processes, versioning, collateral distribution, and integration schedules for internal SOC teams.
• Define and scale processes for IP QA, updates, and pre-/post-silicon validation.
• Coordinate with Architecture, Design, Physical Design, DFT, Validation, Packaging and Board Design teams to resolve integration tradeoffs.
• Lead cross-functional technical reviews and drive resolution of IP and integration issues through to closure.
• Engage with IP vendors and suppliers to manage third-party IP delivery, support, and escalations.

Requirements

Must-have items for this position and additional preferred qualifications.

• Must-have: Relevant technical engineering experience consistent with the degree/experience options summarized in Education Requirements; ability to work on-site ~3 days/week; ability to pass Microsoft Cloud Background Check and meet export-control screening and documentation requirements.
• Must-have: Proven technical leadership and cross-functional stakeholder engagement skills.
• Nice-to-have: Experience integrating and debugging IPs in CPU, GPU, or AI accelerator SoCs; hands-on SoC integration or IP development experience (SRAM, register files, memory compilers, high-speed serial/parallel IOs, subsystem integration).
• Nice-to-have: Familiarity with IP collaterals for front-end, physical design, and DFT; track record of tape-outs in deep sub-micron technologies.
• Nice-to-have: Experience in IP office functions (licensing, release management) and interactions with suppliers of Ethernet, PCIe, HBM, monitor IPs; experience with foundry and external IP vendors.
• Nice-to-have: Scripting skills (Python, Perl) and knowledge of front-end/back-end IP integration flows; strong communication and collaboration skills.
• Other: Travel: less than 25%.

Education Requirements

One of the following or equivalent experience: Doctorate (PhD) in Electrical Engineering, Computer Engineering, Computer Science, or related field (with 1+ year technical engineering experience); Master's degree in those fields (with 4+ years technical engineering experience); or Bachelor's degree in those fields (with 5+ years technical engineering experience). The posting explicitly allows equivalent practical experience in lieu of degree.

About the Company

Company: Microsoft

Headquarters: Redmond, Washington, United States

Microsoft is a global technology company that develops and sells software, services, devices, and solutions. Known for its Windows operating system, Office suite, and Azure cloud platform, Microsoft aims to empower individuals and organizations around the world to achieve more. The company fosters a culture of innovation and inclusion, focusing on delivering trusted experiences to customers and partners globally.