Senior Design Engineer - Digital Implementation / Auto Place & Route

Job Title

Senior Design Engineer - Digital Implementation / Auto Place & Route

Role Summary

Owner of block- and subsystem-level physical implementation for advanced NAND Flash digital designs, responsible from synthesized netlist through tape‑out. The role sits within the Non‑Volatile NAND Design Engineering team and requires close collaboration with RTL, verification, DFT, analog, custom layout, CAD, package, and product teams.

Experience Level

Senior. The job title indicates a senior-level role; no explicit years-of-experience requirement was provided.

Responsibilities

The engineer will drive end-to-end physical implementation and sign-off while improving automation and flow productivity.

• Own RTL-to-GDSII implementation for complex digital blocks and subsystems using automated place-and-route flows.
• Develop and optimize floorplans, power distribution, placement, clock tree synthesis, routing, and post-route optimizations.
• Drive timing closure across multi-mode, multi-corner scenarios through constraint development, static timing analysis, and ECO implementation.
• Perform and resolve physical sign-off checks (DRC, LVS, antenna, signal integrity, congestion, IR-drop, electromigration, power analysis).
• Collaborate with RTL, DFT, analog, custom layout, CAD, package, and verification teams to ensure integration and tape-out readiness.
• Develop scripts, metrics, and reusable methodologies to automate implementation flows and improve quality of results.
• Leverage AI-enabled tools and data-driven methods to accelerate scripting, analysis, debugging, and workflow automation.

Requirements

Key qualifications and technical skills required and preferred.

Must-have:

• Hands-on experience with digital physical design and automated place-and-route flows for ASIC, SoC, or memory designs.
• Proficiency with industry implementation and sign-off tools (examples: Cadence Innovus/Tempus or Synopsys Fusion Compiler/IC Compiler II/PrimeTime).
• Strong understanding of floorplanning, clock distribution, timing closure, low-power design, signal integrity, and physical verification.
• Experience with scripting and flow automation (Tcl, Python, Perl, or equivalent).
• Strong problem-solving, documentation, and communication skills; proven ability to work in global multi-functional teams.

Nice-to-have:

• Experience with NAND Flash or other non-volatile memories and integration of digital blocks with custom/analog macros.
• Experience with advanced technology nodes, hierarchical implementation, ECO flows, and tape-out/sign-off closure.

Education Requirements

Minimum stated degree: M.S. or Ph.D. in Electrical Engineering, Electronics, Computer Engineering, or a related field.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.