Senior CPU RTL Design Engineer – Power Management
Intel CorporationJob Title
Senior CPU RTL Design Engineer – Power Management
Role Summary
Join the CPU Design Team in Intel's Silicon & Platform Engineering group to design power-efficient, high-performance CPU microarchitectures. The role focuses on RTL implementation and power-management features across CPU IP blocks and requires close collaboration with architecture, verification, physical design, and SoC integration teams.
Experience Level
Senior — role expects senior-level experience (typically 9+ years with a Bachelor's degree or 7+ years with a Master’s degree as specified in Education Requirements).
Responsibilities
Technical responsibilities focused on CPU RTL and power-management features.
- Define, design, and implement CPU microarchitecture features with emphasis on power management.
- Develop RTL (SystemVerilog/Verilog) for CPU IP blocks.
- Drive power, performance, and area (PPA) optimization with power-aware RTL practices.
- Design and validate multi-clock-domain and CDC solutions.
- Implement and validate power-management features (DVFS, power/thermal management, reset flows, power-state transitions).
- Debug complex RTL and collaborate with verification teams to resolve system-level issues.
- Partner with SoC integration teams for full-chip delivery and timing closure.
- Contribute to design methodology improvements and scalability.
Requirements
Must-have technical skills and relevant hands-on experience. Preferred items follow.
- Experience with power-management concepts (e.g., DVFS, power states, budgeting).
- Proven low-power / power-aware CPU or SoC RTL design experience.
- RTL development skills in Verilog/SystemVerilog.
- Strong debug skills and system-level design understanding.
- Experience driving PPA optimization for CPU designs.
Nice-to-have / preferred:
- Experience in multi-clock-domain and CDC design.
- Familiarity with Intel architecture (x86) and system architecture concepts.
- Experience with high-speed circuit design, datapath optimization, and arrays.
- Experience with static timing analysis, UPF, lint checks, circuit planning, and timing convergence.
Education Requirements
Bachelor's degree in Electrical/Computer Engineering, Computer Science, or a related field with 9+ years of relevant experience, OR a Master’s degree in the same fields with 7+ years of relevant experience. (Education and years of experience are stated as the minimum qualifications in the source posting.)
About the Company
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.
