Senior Chip Design Verification Engineer, Port IP Group
Work as a verification engineer on the Port IP group to plan and execute RTL verification for front-end designs used in high-speed networking switch, GPU and HCA silicon. The role focuses on ensuring functional correctness and coverage closure under tight power, area and performance constraints.
This position contributes to core networking silicon used in performance-critical systems.
Senior β typically requires 5+ years of RTL verification experience; less experienced candidates with exceptional academic records may be considered.
Primary responsibilities include:
Must-have skills and experience:
Nice-to-have:
B.Sc. in Electrical Engineering, Computer Engineering, or another relevant engineering field is stated; equivalent practical experience is acceptable. The posting also notes preference for high academic grades and that less experienced engineers with strong university records may be considered.
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
