Senior CAD Engineer - Layout/Verification/Simulation

Job Title

Senior CAD Engineer - Layout/Verification/Simulation

Role Summary

Develop and maintain CAD tools, automation, and production flows for custom IC design, layout, simulation, and verification. Work with cross-functional teams to integrate, evaluate, and qualify EDA tools in production environments.

Lead technical projects, mentor engineers, and improve methodology, quality, and efficiency of design and verification workflows.

Experience Level

Senior - typically requires 5+ years of industry experience in CAD, EDA, or semiconductor design.

Responsibilities

Primary responsibilities include developing automation, integrating tools, and supporting production CAD flows.

• Develop, enhance, and debug CAD tools, automation, and flows for custom IC design, layout, simulation, and verification.
• Contribute to layout automation, physical verification, circuit simulation, or digital implementation areas.
• Integrate and qualify in-house and commercial EDA tools for production use.
• Partner with design, layout, verification, and process teams to resolve workflow and tool-integration issues.
• Identify gaps in tools/flows and evaluate EDA industry offerings to improve quality and performance.
• Provide training, documentation, and production support to end users.
• Apply AI/ML techniques and agentic AI to CAD automation, debugging, and user support.
• Develop maintainable, scalable software and mentor engineers on technical skills.
• Lead technical projects and contribute to CAD methodology roadmaps.

Requirements

Must-have technical skills and practical experience required for the role. Education details are listed separately under Education Requirements.

Must-have:

• 5+ years of industry experience in CAD, EDA, or semiconductor design.
• Experience developing or supporting EDA tools and flows in at least one area: custom layout, physical verification, circuit simulation, or digital implementation.
• Experience with IC design CAD tools for schematic capture, layout, simulation, or verification.
• Proficiency in Python and at least one additional language (e.g., SKILL, Tcl, Perl, C, C++).
• Experience with Linux/Unix and shell scripting.
• Solid CMOS and VLSI fundamentals, practical debugging skills, and clear communication across distributed teams.

Nice-to-have:

• Experience with Cadence Virtuoso and SKILL, layout automation or PCell development.
• Experience with Calibre DRC/LVS flows or rule-deck development (SVRF).
• Experience with circuit simulators (Spectre, HSPICE, FineSim, PrimeSim, VCS, Xcelium).
• Experience with RTL-to-GDS implementation tools (Fusion Compiler, Innovus, PrimeTime, Formality).
• Experience with parasitic extraction tools (StarRC, Quantus).
• Experience applying AI/ML or large language models to engineering workflows.
• Familiarity with source control, automated testing, and release management.
• Knowledge of DRAM, HBM, NAND, or emerging memory development.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or Computer Science, or equivalent practical experience.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.