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Senior ASIC Verification Engineer

Hewlett Packard Enterprise
November 2, 2026
Full-time
Remote friendly (Sunnyvale, California, United States)
Worldwide
$158,500 - $321,000 USD yearly
Verification Jobs, Level - Senior

Job Title

Senior ASIC Verification Engineer

Role Summary

Lead verification activities for ASIC modules and subsystems within a VLSI design organization. Work with logic designers, software engineers, and outsourced partners to develop test plans, build UVM/SystemVerilog testbenches, run simulations and formal checks, and support lab bring-up and full-chip validation.

Experience Level

Senior - typically 6–10 years of VLSI design, verification, or implementation experience.

Responsibilities

Primary responsibilities include technical leadership of verification efforts and delivering verified modules into system integration.

  • Create detailed module functional specifications and verification test plans.
  • Develop functional models and verification environments using SystemVerilog (and C/C++ where applicable).
  • Build UVM-based block-level and full-chip testbenches and implement constrained-random tests.
  • Perform code coverage analysis, gate-level simulation, formal verification, and other verification sign-offs.
  • Collaborate with logic designers to debug issues and with SW engineers to support driver development.
  • Participate in emulation, subsystem/full-chip testing, and ASIC lab bring-up.
  • Provide technical leadership and mentor junior engineers and interns.

Requirements

Must-have technical skills and experience; concise list of required and preferred capabilities.

  • Proven experience developing block-level and full-chip verification environments using SystemVerilog and UVM.
  • Strong understanding of digital logic, VLSI verification methodologies, and EDA tool flows (simulation, formal, coverage).
  • Experience with constrained-random verification and building comprehensive test suites.
  • Hands-on experience with code coverage analysis, gate-level simulation, and formal verification tools.
  • Proficiency in scripting and programming (Python, Perl, C, C++).
  • Experience with ASIC lab validation, emulation, and subsystem/integration testing.
  • Demonstrated problem-solving, technical leadership, and written/verbal communication skills.
  • Nice-to-have: knowledge of computer architecture, networking protocols, or machine learning workloads; patents or publications in VLSI/hardware.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field - or equivalent practical experience. Posting also notes coursework in VLSI design; patents/publications are cited as evidence of subject-matter expertise.


About the Company

Company: Hewlett Packard Enterprise

Headquarters: Spring, TX, United States

Global enterprise technology company delivering hybrid cloud, edge-to-cloud platforms, servers, storage, networking, and IT services to help organizations build, run, and secure applications and infrastructure at scale.

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Date Posted: 2026-11-02