Senior ASIC Power Management Micro Architect, Chip Design
Lead micro-architecture and front-end design for Power Management IP within the Chip Design team, owning blocks from specification through post-silicon bring-up and enablement. Collaborate with architecture, verification, physical design and validation teams to deliver synthesizable RTL and working silicon.
Senior-level β 12+ years of relevant RTL and ASIC design experience as specified in the posting.
Primary responsibilities include:
Must-have:
Nice-to-have:
BSc or MSc in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
