Senior ASIC/FPGA Verification Engineer

Job Title

Senior ASIC/FPGA Verification Engineer

Role Summary

Join the Applied Research and Technology (ART) Microelectronics Technology team to lead chip-level verification of high-performance digital FPGAs and ASICs for defense and mission systems. Work focuses on verification architecture, testbench development, and integration with design teams to validate ASIC/FPGA solutions.

Experience Level

Senior — typically requires 5+ years of relevant industry experience; 3+ years may be acceptable with an advanced degree.

Responsibilities

Primary responsibilities include designing verification environments, developing testbenches, and coordinating with design and validation engineers.

• Design verification environment architecture using SystemVerilog with OVM/UVM.
• Create written test plans, testcases, and maintain code and functional coverage metrics.
• Develop testbenches for RTL blocks using VHDL and/or SystemVerilog.
• Integrate and validate ASIC/FPGA solutions with design engineers; support lab bring-up and debug.
• Provide technical guidance and mentorship to engineers and team members.
• May lead verification teams: break down work, plan activities, and report status.
• Contribute to engineering estimates for program pursuits.

Requirements

Must-have technical qualifications and security requirements for immediate start.

• Active, transferable U.S. government Secret security clearance required prior to start date.
• U.S. citizenship required (eligibility for security clearance).
• Demonstrated experience developing and simulating RTL using VHDL and/or Verilog in a professional FPGA or ASIC environment.
• Proven ability to design, implement, and execute verification testbenches using VHDL and/or SystemVerilog.
• Working knowledge of chip-level verification methodologies: constrained-random testing, functional coverage, and assertion-based verification (SystemVerilog).
• Proficiency with revision control tools and concepts (e.g., Git, Subversion).

Nice-to-have:

• Experience with high-speed digital interfaces and protocols (DDR, PCIe, Ethernet).
• ASIC/FPGA lab validation and debug experience with standard lab equipment.
• Familiarity with industry tools such as QuestaSim, Synplify, Quartus, or Vivado.
• Background in aerospace, defense, or mission-critical systems.
• Proficiency with Unix/Linux environments and scripting.

Education Requirements

Bachelor's degree in a STEM field (Science, Technology, Engineering or Mathematics) is typical; an advanced degree in a related field is acceptable. Typical experience expectations: minimum 5 years with a Bachelor's degree, or minimum 3 years with an advanced degree.

About the Company

Company: Raytheon Technologies

Headquarters: Arlington, VA, USA

Raytheon Technologies is an Aerospace and Defense company offering advanced systems and services for commercial, military, and government customers worldwide. Formed in 2020 from the merger of Raytheon Company and United Technologies Corporation, it operates through three major business units: Collins Aerospace Systems, Pratt & Whitney, and Raytheon. The company specializes in delivering cutting-edge solutions across various fields including quantum physics, hypersonics, and cybersecurity.