Senior ASIC Floorplan Design Engineer
Design and implement floorplans for SOCs, CPUs, and GPUs. Work with architects, RTL designers, physical design, and packaging teams to optimize area, performance, power, and cost across multiple product lines.
Role contributes to next-generation compute and AI products by defining and executing robust floorplanning and physical-design strategies.
Senior β the posting specifies 10+ years of relevant ASIC/SoC physical-design and subsystem development experience.
Core responsibilities include technical leadership of floorplan and physical-design activities and delivery of automation to improve productivity.
Must-have technical skills and experience; items labeled "Preferred" are useful but not mandatory.
Advertised: MSEE / MSCE or equivalent practical experience in chip development. Equivalent industry experience is explicitly acceptable.
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
