Senior ASIC Engineer, Infra and Workflow - Networking Chip Design
Join NVIDIA's Switch Silicon design team within the Networking business unit to improve chip design infrastructure and workflows and to contribute to next-generation switch silicon. The role focuses on workflow refinement, cross-team coordination, and supporting high-throughput, low-latency chip delivery.
Work closely with architecture, micro-architecture, firmware, and other teams to meet project milestones and improve the full-chip design flow.
Senior-level. The posting requests 3+ years of relevant ASIC frontend or full-chip experience.
Key responsibilities include:
Must-have skills and experience:
Nice-to-have:
Bachelor's degree in Electrical Engineering (B.Sc.) or Computer Engineering (B.Sc.) is requested in the posting; equivalent practical experience is acceptable. High academic standing was noted as preferred.
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
