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Senior ASIC Design Engineer, Compute DSP/AI Processors (multiple levels)

Qualcomm
August 31, 2026
Full-time
On-site
Markham, Ontario, Canada
RTL Design Jobs, Level - Senior

Job Title

Senior ASIC Design Engineer, Compute DSP/AI Processors (multiple levels)

Role Summary

Join a compact ASIC IP team within Qualcomm's Snapdragon DSP/NPU organization to design high-performance, low-power digital hardware for AI, DSP and video processing. The team includes architects, design and verification engineers working on HW IP that integrates with other NPU components.

Work spans RTL design, synthesis evaluation, assertion- and coverage-driven verification, and cross-team integration with software and verification groups.

Experience Level

Open to multiple experience levels (new grad through senior). Roles and responsibilities will be commensurate with experience; senior-level candidates are expected to have prior ASIC design experience (multiple years) and responsibility for high-performance, low-power processor design.

Responsibilities

Key responsibilities include design, verification support, and integration of digital HW IP:

  • Design high-speed, high-bandwidth, low-power digital hardware in SystemVerilog.
  • Define and document micro-architecture and HW IP interfaces.
  • Create assertion-based models and functional coverage in SystemVerilog.
  • Evaluate synthesis results and optimize for timing, power and area.
  • Collaborate with verification teams to debug, close coverage, and validate designs.
  • Support hardware integration and software teams during bring-up and application testing.
  • Use industry tools (simulators, synthesis, lint, CDC, LEC, CLP) to improve design quality.
  • Identify and resolve architecture, design, and verification issues with engineering best practices.

Requirements

Must-have technical skills and traits:

  • Proficient in SystemVerilog for RTL design and assertions.
  • Experience with ASIC design flows, synthesis, and timing closure.
  • Familiarity with commercial EDA tools (simulators, Synopsys/ Cadence/ Mentor toolsets, lint, CDC, LEC).
  • Knowledge of functional coverage and formal/ assertion-based verification approaches.
  • Understanding of digital logic and high-performance processor design concepts (timing, power, area trade-offs).
  • Strong problem-solving, attention to detail, and communication skills; able to work independently and in teams.
  • Ability to collaborate with software and system teams for integration and feature development.

Education Requirements

Degree and equivalency options stated in the posting: Bachelor's degree in Science, Engineering, or related field (typical baseline) with 4+ years of relevant ASIC design/verification/integration experience; or Master's degree plus 3+ years; or PhD plus 2+ years. The posting also references engineering fields such as Engineering and Computer Engineering and notes new-graduate entry (coursework/co-op experience) as acceptable for junior roles. Equivalent practical experience is accepted as alternative to formal degree combinations.


About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

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Date Posted: 2026-08-31