Senior Applications Engineer, Fusion Compiler

Job Title

Senior Applications Engineer, Fusion Compiler

Role Summary

Provide technical engineering support for Fusion Compiler deployment and RTL-to-GDS implementation to help customers achieve tapeout and design closure. Work directly with customer design teams and internal R&D to diagnose physical-design issues, develop fixes and automation, and feed real-world cases into product development.

Experience Level

Senior-level; the posting specifies 5–8 years of hands-on ASIC, physical design, implementation, or CAD engineering experience.

Responsibilities

Primary customer-facing and technical responsibilities focused on physical implementation, closure, and automation.

• Support customers through physical design implementation and design closure using Fusion Compiler and related tools.
• Debug complex timing, power, congestion, routing, and runtime issues across the RTL-to-GDS flow.
• Provide technical guidance on synthesis, place-and-route, timing closure, power optimization, and advanced implementation methodologies.
• Develop and maintain automation scripts (Python, Perl, TCL) to streamline workflows and improve turnaround.
• Use AI-assisted tools and workflows to accelerate debug, automate repetitive tasks, and improve support efficiency.
• Collaborate with internal R&D to reproduce customer issues, validate tool behavior, and deliver product feedback.
• Present technical solutions and recommendations to senior customer engineers and design leads during critical project phases.
• Work across the full RTL-to-GDS flow from implementation through signoff and tapeout readiness.

Requirements

Key requirements (must-have unless noted):

• 5–8 years of hands-on ASIC, physical design, implementation, or CAD engineering experience (senior level).
• Proven experience with RTL-to-GDS flows: synthesis, place-and-route, timing closure, and physical optimization.
• Strong working knowledge of Fusion Compiler, ICC2, or equivalent digital implementation tools.
• Proficiency in scripting with Python, Perl, and TCL for automation and workflow improvement.
• Solid understanding of timing, power, congestion, routing, and design-closure methodologies.
• Demonstrated ability to leverage AI-assisted workflows and automation to improve engineering productivity.
• Business-level English and ability to engage directly with customers, including onsite engagements.
• Nice-to-have: familiarity with Formality/Formality ECO, PrimeTime or other signoff tools, and experience at advanced nodes (7nm, 5nm, 3nm).

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (specified in the posting). The posting also specifies 5–8 years of relevant hands-on experience; no explicit alternate "equivalent experience" language was provided.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.