Senior Application Engineer

Job Title

Senior Application Engineer

Role Summary

Senior Application Engineer on the Synopsys Verification Group focused on the ZeBu emulation platform. The role supports presales evaluations, post-sales deployments, and close collaboration with R&D and field teams to help customers deploy emulation for complex SoC verification.

This is a customer-facing, technical role that combines system bring-up, in-field debugging, and feedback to product engineering to improve emulation workflows and platform capabilities.

Experience Level

Senior — requires significant hands-on experience; posting specifies 8+ years of relevant experience.

Responsibilities

Primary responsibilities include system deployment, customer support, and enabling successful emulation usage:

• Deploy and configure ZeBu emulation systems for evaluations and production, resolving complex bring-up issues on ASIC/SoC designs.
• Debug verification and embedded software issues across HDL, HVL, and software layers to identify root cause.
• Support presales demonstrations and proof-of-concept flows to show emulation capabilities and fit within customer verification strategies.
• Provide pre- and post-sales technical support and resolve escalations involving methodology, configuration, performance tuning, or integration.
• Collaborate with Sales, Marketing, and R&D to communicate customer requirements and recurring issues that inform the product roadmap.
• Create application notes, reference flows, and technical collateral to accelerate customer adoption.
• Analyze customer designs and recommend partitioning, testbench architecture, and co-simulation approaches to maximize emulation performance and capacity.

Requirements

Must-have technical skills and experience. Nice-to-have items noted where applicable.

• 8+ years of hands-on experience in IC design, verification, emulation, or FPGA prototyping.
• Strong knowledge of ASIC design verification methodologies, including simulation, testbench development, and coverage-driven verification.
• Proficiency with Verilog and VHDL; solid understanding of design writing, synthesis, and debug.
• Understanding of RTL-to-gate flows including synthesis, timing, and sign-off concepts.
• Experience tracing issues across RTL, gate-level, and embedded software to root cause problems.
• Strong communication skills: able to explain technical issues to customers and document workarounds clearly.
• Nice to have: SystemVerilog or C/C++ experience in testbench development or embedded software validation.

Education Requirements

Bachelor's or Master's in Electrical Engineering, Computer Engineering, or equivalent practical experience (the posting explicitly allows equivalent practical experience in lieu of degree).

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.