PHIZENIX logo

Senior Analog & Mixed-Signal IC Designer

PHIZENIX
July 29, 2026
Full-time
On-site
Santa Clara, California, United States
ASIC Design Jobs, Level - Senior

Job Title

Senior Analog & Mixed-Signal IC Designer

Role Summary

Senior individual contributor or technical lead responsible for analog and mixed-signal IC design for high-speed data communications, optical interconnects, wireless, and compute applications. Work spans concept, transistor-level design, verification, layout collaboration, and silicon bring-up.

Join a semiconductor design team delivering next-generation silicon in advanced FinFET and SOI processes with strong cross-functional interaction across digital, CAD, layout, and systems engineering.

Experience Level

Senior / Staff-level. Typical experience: Ph.D. with 6+ years or M.S. with 8+ years of analog/mixed-signal IC design experience (see Education Requirements for details).

Responsibilities

Core responsibilities include end-to-end analog/mixed-signal IC development and mentorship.

  • Design and verify high-speed analog and mixed-signal blocks: ADCs, DACs, PLLs, clock distribution, laser/modulator drivers, TIAs, and wideband amplifiers.
  • Architect and implement wireline SerDes front-ends, optical interconnect ICs, and multi-GHz analog signal chains from concept through tape-out.
  • Develop transistor-level schematics and work with layout engineers to meet performance, power, and area (PPA) targets in advanced FinFET or SOI technologies.
  • Lead pre-silicon simulation, support post-silicon bring-up, analyze measured silicon, and iterate designs to close specification gaps.
  • Define mixed-signal partitioning and interface specifications in partnership with digital, CAD, and system teams; document designs and present technical status to stakeholders.
  • Mentor junior designers and help establish best practices across the organization.

Requirements

Concise list of must-have technical skills and desirable additions.

Must-have
  • Deep analog / high-speed circuit design experience: wideband amplifiers, comparators, bias networks, ESD-tolerant I/Os, and clocking systems (DLLs, fractional-N, jitter budgeting, oscillators).
  • Experience designing ADCs and DACs (pipeline, SAR, flash, current-steering) and low-speed converters for control/calibration.
  • Experience with laser/modulator drivers and transimpedance amplifiers (TIAs) for optical applications.
  • Hands-on transistor-level design in advanced nodes (5–16 nm FinFET) and/or SOI processes; ability to drive PPA tradeoffs with layout teams.
  • Experience with pre-silicon simulation and post-silicon characterization and debugging.
Nice-to-have
  • RFIC design experience (LNA, mixer, PA driver, broadband RF front-ends) and familiarity with RF passives and EM tools.
  • Experience with high-speed wireline PHYs (56G / 112G PAM-4 SerDes) and optical module ICs (TOSA/ROSA drivers, coherent interfaces).
  • Proficiency with Cadence Virtuoso, Spectre / APS / Ultrasim, Ultrasim, and industry-standard layout and EM tools; lab characterization skills (oscilloscopes, VNAs, spectrum analyzers, BERT).
  • Publications or patents in analog/mixed-signal IC design.

Education Requirements

Ph.D. in Electrical Engineering or a related field with 6+ years of analog/mixed-signal IC design experience, or M.S. in Electrical Engineering or a related field with 8+ years of analog/mixed-signal IC design experience.


About the Company

Company: PHIZENIX

Semiconductor company focused on designing high-performance analog and mixed-signal integrated circuits for data communications, wireless, compute, and optical interconnect applications, with expertise in high-speed SerDes, ADCs/DACs, TIAs, and advanced FinFET/SOI processes.

PHIZENIX logo

Date Posted: 2026-07-27